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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id u13-20020a170903124d00b0017f80305239sm13333132plh.136.2022.10.20.12.14.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 12:14:29 -0700 (PDT) Date: Thu, 20 Oct 2022 19:14:26 +0000 From: Sean Christopherson To: Maxim Levitsky Cc: kvm@vger.kernel.org, Cathy Avery , Paolo Bonzini Subject: Re: [kvm-unit-tests PATCH 02/16] x86: add few helper functions for apic local timer Message-ID: References: <20221020152404.283980-1-mlevitsk@redhat.com> <20221020152404.283980-3-mlevitsk@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221020152404.283980-3-mlevitsk@redhat.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, Oct 20, 2022, Maxim Levitsky wrote: > Add a few functions to apic.c to make it easier to enable and disable > the local apic timer. > > Signed-off-by: Maxim Levitsky > --- > lib/x86/apic.c | 37 +++++++++++++++++++++++++++++++++++++ > lib/x86/apic.h | 6 ++++++ > 2 files changed, 43 insertions(+) > > diff --git a/lib/x86/apic.c b/lib/x86/apic.c > index 5131525a..dc6d3862 100644 > --- a/lib/x86/apic.c > +++ b/lib/x86/apic.c > @@ -256,3 +256,40 @@ void init_apic_map(void) > id_map[j++] = i; > } > } > + > +void apic_setup_timer(int vector, bool periodic) > +{ > + /* APIC runs with 'CPU core clock' divided by value in APIC_TDCR */ > + > + u32 lvtt = vector | > + (periodic ? APIC_LVT_TIMER_PERIODIC : APIC_LVT_TIMER_ONESHOT); Rather than take @periodic, take the mode. That way this funky ternary operator goes away and the callers are self-tdocumenting, e.g. this apic_setup_timer(TIMER_VECTOR, APIC_LVT_TIMER_PERIODIC); is more obvious than apic_setup_timer(TIMER_VECTOR, true); > + > + apic_cleanup_timer(); > + apic_write(APIC_TDCR, APIC_TDR_DIV_1); > + apic_write(APIC_LVTT, lvtt); > +} > + > +void apic_start_timer(u32 counter) > +{ > + apic_write(APIC_TMICT, counter); > +} > + > +void apic_stop_timer(void) > +{ > + apic_write(APIC_TMICT, 0); > +} > + > +void apic_cleanup_timer(void) > +{ > + u32 lvtt = apic_read(APIC_LVTT); > + > + // stop the counter > + apic_stop_timer(); > + > + // mask the timer interrupt > + apic_write(APIC_LVTT, lvtt | APIC_LVT_MASKED); > + > + // ensure that a pending timer is serviced > + irq_enable(); Jumping back to the "nop" patch, I'm reinforcing my vote to add sti_nop(). I actually starting typing a response to say this is broken before remembering that a nop got added to irq_enable(). > + irq_disable(); > +} > diff --git a/lib/x86/apic.h b/lib/x86/apic.h > index 6d27f047..db691e2a 100644 > --- a/lib/x86/apic.h > +++ b/lib/x86/apic.h > @@ -58,6 +58,12 @@ void disable_apic(void); > void reset_apic(void); > void init_apic_map(void); > > +void apic_cleanup_timer(void); > +void apic_setup_timer(int vector, bool periodic); > + > +void apic_start_timer(u32 counter); > +void apic_stop_timer(void); > + > /* Converts byte-addressable APIC register offset to 4-byte offset. */ > static inline u32 apic_reg_index(u32 reg) > { > -- > 2.26.3 >