From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96801C4708E for ; Thu, 8 Dec 2022 00:27:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229546AbiLHA1M (ORCPT ); Wed, 7 Dec 2022 19:27:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229449AbiLHA1J (ORCPT ); Wed, 7 Dec 2022 19:27:09 -0500 X-Greylist: delayed 1806 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 07 Dec 2022 16:27:08 PST Received: from out-123.mta0.migadu.com (out-123.mta0.migadu.com [91.218.175.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A604F88B48 for ; Wed, 7 Dec 2022 16:27:08 -0800 (PST) Date: Thu, 8 Dec 2022 00:27:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1670459226; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=R8bdcc50wn8UsmiJI5n21HPc9V1IZkZNXUkx+5w7LeM=; b=LtxGLfgdz34RIqWijaQ+k2KPddTbVRBOnyMr/S2dcqR+op21TvVEcK8B4TysysD2vTkcPF FT17LaFAkwidPdPfNVkviHSMB5dnJRhtZG7UYRSq7lRDazE4GcDoNK0q+TP+8msYlFAq2L TRWNQfMlVL23nt6S/7a2W5rSHEhTt9c= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Sean Christopherson Cc: Marc Zyngier , James Morse , Alexandru Elisei , Paolo Bonzini , Shuah Khan , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kvmarm@lists.linux.dev, Ricardo Koller , linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/4] KVM: arm64: selftests: Align VA space allocator with TTBR0 Message-ID: References: <20221207214809.489070-1-oliver.upton@linux.dev> <20221207214809.489070-4-oliver.upton@linux.dev> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, Dec 08, 2022 at 12:18:07AM +0000, Sean Christopherson wrote: [...] > Together, what about? The #ifdef is a bit gross, especially around "hi_start", > but it's less duplicate code. And IMO, having things bundled in the same place > makes it a lot easier for newbies (to arm64 or kernel coding in general) to > understand what's going on and why arm64 is different. I'd rather we not go this route. We really shouldn't make any attempt to de-dupe something that is inherently architecture specific. For example: > + /* > + * All architectures supports splitting the virtual address space into > + * a high and a low half. Populate both halves, except for arm64 which > + * currently uses only TTBR0_EL1 (arbitrary selftests "logic"), i.e. > + * only has a valid low half. > + */ > + sparsebit_num_t nr_va_bits = (1ULL << (vm->va_bits - 1)) >> vm->page_shift; This is still wrong for arm64. When we say the VA space is 48 bits, we really do mean that TTBR0 is able to address a full 48 bits. So this truncates the MSB for the addressing mode. With the code living in the arm64 side of the shop, I can also tailor the comment to directly match the architecture to provide breadcrumbs tying it back to the Arm ARM. -- Thanks, Oliver