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From: Sean Christopherson <seanjc@google.com>
To: Like Xu <like.xu.linux@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	kan.liang@linux.intel.com, wei.w.wang@intel.com,
	Like Xu <like.xu@linux.intel.com>,
	Andi Kleen <ak@linux.intel.com>,
	"Paolo Bonzini - Distinguished Engineer (kernel-recipes.org)
	(KVM HoF)"  <pbonzini@redhat.com>,
	Jim Mattson <jmattson@google.com>, kvm list <kvm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Yang Weijiang <weijiang.yang@intel.com>
Subject: Re: [PATCH v2 01/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers
Date: Thu, 22 Dec 2022 17:41:24 +0000	[thread overview]
Message-ID: <Y6SWxEZrIqDPD69l@google.com> (raw)
In-Reply-To: <449b561a-7053-8994-bcfe-581c0abb8d85@gmail.com>

On Thu, Dec 22, 2022, Like Xu wrote:
> Hi Peter, would you help apply this one in your tip/perf tree,
> as it doesn't seem to be closely tied to the KVM changes. Thanks.
> 
> On 25/11/2022 12:05 pm, Yang Weijiang wrote:
> > From: Like Xu <like.xu@linux.intel.com>
> > 
> > The x86_pmu.lbr_info is 0 unless explicitly initialized, so there's
> > no point checking x86_pmu.intel_cap.lbr_format.
> > 
> > Cc: Peter Zijlstra <peterz@infradead.org>
> > Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
> > Reviewed-by: Andi Kleen <ak@linux.intel.com>
> > Signed-off-by: Like Xu <like.xu@linux.intel.com>
> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> > ---
> >   arch/x86/events/intel/lbr.c | 4 +---
> >   1 file changed, 1 insertion(+), 3 deletions(-)
> > 
> > diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
> > index 4dbde69c423b..e7caabfa1377 100644
> > --- a/arch/x86/events/intel/lbr.c
> > +++ b/arch/x86/events/intel/lbr.c
> > @@ -1606,12 +1606,10 @@ void __init intel_pmu_arch_lbr_init(void)
> >    */
> >   void x86_perf_get_lbr(struct x86_pmu_lbr *lbr)
> >   {
> > -	int lbr_fmt = x86_pmu.intel_cap.lbr_format;
> > -
> >   	lbr->nr = x86_pmu.lbr_nr;
> >   	lbr->from = x86_pmu.lbr_from;
> >   	lbr->to = x86_pmu.lbr_to;
> > -	lbr->info = (lbr_fmt == LBR_FORMAT_INFO) ? x86_pmu.lbr_info : 0;
> > +	lbr->info = x86_pmu.lbr_info;

This stable-worthy a bug fix, no?  E.g. won't the existing code misreport lbr->info
if the format is LBR_FORMAT_INFO2?

> >   }
> >   EXPORT_SYMBOL_GPL(x86_perf_get_lbr);

  parent reply	other threads:[~2022-12-22 17:41 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-25  4:05 [PATCH v2 00/15] Introduce Architectural LBR for vPMU Yang Weijiang
2022-11-25  4:05 ` [PATCH v2 01/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-12-22 10:57   ` Like Xu
2022-12-22 13:29     ` Peter Zijlstra
2022-12-22 17:41     ` Sean Christopherson [this message]
2022-12-23  2:12       ` Like Xu
2022-11-25  4:05 ` [PATCH v2 02/15] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-11-25  4:05 ` [PATCH v2 03/15] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2023-01-26 19:50   ` Sean Christopherson
2023-01-30  6:33     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 04/15] KVM: PMU: disable LBR handling if architectural LBR is available Yang Weijiang
2023-01-27 20:10   ` Sean Christopherson
2023-01-30  8:10     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 05/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-12-22 11:00   ` Like Xu
2022-12-25  4:30     ` Yang, Weijiang
2022-12-22 11:15   ` Like Xu
2023-01-27 20:25   ` Sean Christopherson
2023-01-30 11:46     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-12-22 11:09   ` Like Xu
2022-12-25  4:27     ` Yang, Weijiang
2022-12-22 11:19   ` Like Xu
2022-12-25  4:16     ` Yang, Weijiang
2022-12-22 11:24   ` Like Xu
2022-12-25  4:08     ` Yang, Weijiang
2023-01-27 21:42   ` Sean Christopherson
2022-11-25  4:05 ` [PATCH v2 07/15] KVM: VMX: Support passthrough of architectural LBRs Yang Weijiang
2022-11-25  4:05 ` [PATCH v2 08/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2023-01-27 21:43   ` Sean Christopherson
2023-01-30 12:27     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 09/15] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2023-01-27 21:46   ` Sean Christopherson
2023-01-30 12:37     ` Yang, Weijiang
2022-11-25  4:05 ` [PATCH v2 10/15] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-12-22 11:06   ` Like Xu
2022-12-25  4:28     ` Yang, Weijiang
2023-01-27 22:04   ` Sean Christopherson
2022-11-25  4:06 ` [PATCH v2 11/15] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2023-01-27 22:07   ` Sean Christopherson
2023-01-30 13:13     ` Yang, Weijiang
2022-11-25  4:06 ` [PATCH v2 12/15] KVM: x86/vmx: Disable Arch LBREn bit in #DB and warm reset Yang Weijiang
2022-12-22 11:22   ` Like Xu
2022-12-25  4:12     ` Yang, Weijiang
2023-01-27 22:09   ` Sean Christopherson
2023-01-30 13:09     ` Yang, Weijiang
2022-11-25  4:06 ` [PATCH v2 13/15] KVM: x86/vmx: Save/Restore guest Arch LBR Ctrl msr at SMM entry/exit Yang Weijiang
2023-01-27 22:11   ` Sean Christopherson
2023-01-30 12:50     ` Yang, Weijiang
2022-11-25  4:06 ` [PATCH v2 14/15] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2023-01-27 22:13   ` Sean Christopherson
2023-01-30 12:46     ` Yang, Weijiang
2023-01-30 17:30       ` Sean Christopherson
2023-01-31 13:14         ` Yang, Weijiang
2023-01-31 16:05           ` Sean Christopherson
2022-11-25  4:06 ` [PATCH v2 15/15] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-12-22 11:03   ` Like Xu
2022-12-25  4:31     ` Yang, Weijiang
2023-01-27 22:15   ` Sean Christopherson
2023-01-12  1:57 ` [PATCH v2 00/15] Introduce Architectural LBR for vPMU Yang, Weijiang
2023-01-27 22:46 ` Sean Christopherson
2023-01-30 13:38   ` Yang, Weijiang
2023-06-05  9:50   ` Like Xu

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