From: Sean Christopherson <seanjc@google.com>
To: Yang Weijiang <weijiang.yang@intel.com>
Cc: pbonzini@redhat.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] KVM: nVMX: Set X86_CR4_CET in cr4_fixed1_bits if CET IBT is enabled
Date: Mon, 1 Mar 2021 09:39:45 -0800 [thread overview]
Message-ID: <YD0m4cALoArLO4ek@google.com> (raw)
In-Reply-To: <20210225030951.17099-1-weijiang.yang@intel.com>
On Thu, Feb 25, 2021, Yang Weijiang wrote:
> CET SHSTK and IBT are independently controlled by kernel, set X86_CR4_CET
> bit in cr4_fixed1_bits if either of them is enabled so that nested guest
> can enjoy the feature.
>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> ---
> arch/x86/kvm/vmx/vmx.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 5856c5b81084..e92134ee081c 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -7258,6 +7258,7 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu)
> cr4_fixed1_update(X86_CR4_UMIP, ecx, feature_bit(UMIP));
> cr4_fixed1_update(X86_CR4_LA57, ecx, feature_bit(LA57));
> cr4_fixed1_update(X86_CR4_CET, ecx, feature_bit(SHSTK));
> + cr4_fixed1_update(X86_CR4_CET, edx, feature_bit(IBT));
Ugh, what sadist put SHSTK and IBT in separate output registers.
Reviewed-by: Sean Christopherson <seanjc@google.com>
>
> #undef cr4_fixed1_update
> }
> --
> 2.26.2
>
prev parent reply other threads:[~2021-03-01 17:42 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-25 3:09 [PATCH] KVM: nVMX: Set X86_CR4_CET in cr4_fixed1_bits if CET IBT is enabled Yang Weijiang
2021-02-25 3:09 ` [PATCH v2] KVM: nVMX: Sync L2 guest CET states between L1/L2 Yang Weijiang
2021-03-01 17:46 ` Sean Christopherson
2021-03-02 9:05 ` Yang Weijiang
2021-03-02 9:33 ` Paolo Bonzini
2021-03-02 10:35 ` Vitaly Kuznetsov
2021-03-03 6:09 ` Yang Weijiang
2021-03-01 17:39 ` Sean Christopherson [this message]
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