From: Sean Christopherson <seanjc@google.com>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: Reiji Watanabe <reijiw@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
KVM <kvm@vger.kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 46/46] KVM: x86: Preserve guest's CR0.CD/NW on INIT
Date: Wed, 28 Jul 2021 20:44:33 +0000 [thread overview]
Message-ID: <YQHBsbHYayhSJOSz@google.com> (raw)
In-Reply-To: <A41676B6-2E9F-4F8E-B91E-8F9A077A2FA8@gmail.com>
On Mon, Jul 26, 2021, Nadav Amit wrote:
>
> > On Jul 19, 2021, at 9:37 PM, Reiji Watanabe <reijiw@google.com> wrote:
> >
> > On Tue, Jul 13, 2021 at 9:35 AM Sean Christopherson <seanjc@google.com> wrote:
> >>
> >> Preserve CR0.CD and CR0.NW on INIT instead of forcing them to '1', as
> >> defined by both Intel's SDM and AMD's APM.
> >>
> >> Note, current versions of Intel's SDM are very poorly written with
> >> respect to INIT behavior. Table 9-1. "IA-32 and Intel 64 Processor
> >> States Following Power-up, Reset, or INIT" quite clearly lists power-up,
> >> RESET, _and_ INIT as setting CR0=60000010H, i.e. CD/NW=1. But the SDM
> >> then attempts to qualify CD/NW behavior in a footnote:
> >>
> >> 2. The CD and NW flags are unchanged, bit 4 is set to 1, all other bits
> >> are cleared.
> >>
> >> Presumably that footnote is only meant for INIT, as the RESET case and
> >> especially the power-up case are rather non-sensical. Another footnote
> >> all but confirms that:
> >>
> >> 6. Internal caches are invalid after power-up and RESET, but left
> >> unchanged with an INIT.
> >>
> >> Bare metal testing shows that CD/NW are indeed preserved on INIT (someone
> >> else can hack their BIOS to check RESET and power-up :-D).
> >>
> >> Reported-by: Reiji Watanabe <reijiw@google.com>
> >> Signed-off-by: Sean Christopherson <seanjc@google.com>
> >
> > Reviewed-by: Reiji Watanabe <reijiw@google.com>
> >
> > Thank you for the fix and checking the CD/NW with the bare metal testing.
>
> Interesting.
>
> Is there a kvm-unit-test to reproduce the issue by any chance?
No :-/
next prev parent reply other threads:[~2021-07-28 20:44 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-13 16:32 [PATCH v2 00/46] KVM: x86: vCPU RESET/INIT fixes and consolidation Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 01/46] KVM: x86: Flush the guest's TLB on INIT Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 02/46] KVM: nVMX: Set LDTR to its architecturally defined value on nested VM-Exit Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 03/46] KVM: SVM: Zero out GDTR.base and IDTR.base on INIT Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 04/46] KVM: VMX: Set EDX at INIT with CPUID.0x1, Family-Model-Stepping Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 05/46] KVM: SVM: Require exact CPUID.0x1 match when stuffing EDX at INIT Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 06/46] KVM: SVM: Fall back to KVM's hardcoded value for EDX at RESET/INIT Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 07/46] KVM: VMX: Remove explicit MMU reset in enter_rmode() Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 08/46] KVM: SVM: Drop explicit MMU reset at RESET/INIT Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 09/46] KVM: SVM: Drop a redundant init_vmcb() from svm_create_vcpu() Sean Christopherson
2021-07-26 20:33 ` Paolo Bonzini
2021-07-26 22:26 ` Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 10/46] KVM: VMX: Move init_vmcs() invocation to vmx_vcpu_reset() Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 11/46] KVM: x86: WARN if the APIC map is dirty without an in-kernel local APIC Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 12/46] KVM: x86: Remove defunct BSP "update" in local APIC reset Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 13/46] KVM: x86: Migrate the PIT only if vcpu0 is migrated, not any BSP Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 14/46] KVM: x86: Don't force set BSP bit when local APIC is managed by userspace Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 15/46] KVM: x86: Set BSP bit in reset BSP vCPU's APIC base by default Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 16/46] KVM: VMX: Stuff vcpu->arch.apic_base directly at vCPU RESET Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 17/46] KVM: x86: Open code necessary bits of kvm_lapic_set_base() " Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 18/46] KVM: x86: Consolidate APIC base RESET initialization code Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 19/46] KVM: x86: Move EDX initialization at vCPU RESET to common code Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 20/46] KVM: SVM: Don't bother writing vmcb->save.rip at vCPU RESET/INIT Sean Christopherson
2021-07-13 16:32 ` [PATCH v2 21/46] KVM: VMX: Invert handling of CR0.WP for EPT without unrestricted guest Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 22/46] KVM: VMX: Remove direct write to vcpu->arch.cr0 during vCPU RESET/INIT Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 23/46] KVM: VMX: Fold ept_update_paging_mode_cr0() back into vmx_set_cr0() Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 24/46] KVM: nVMX: Do not clear CR3 load/store exiting bits if L1 wants 'em Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 25/46] KVM: VMX: Pull GUEST_CR3 from the VMCS iff CR3 load exiting is disabled Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 26/46] KVM: x86/mmu: Skip the permission_fault() check on MMIO if CR0.PG=0 Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 27/46] KVM: VMX: Process CR0.PG side effects after setting CR0 assets Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 28/46] KVM: VMX: Skip emulation required checks during pmode/rmode transitions Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 29/46] KVM: nVMX: Don't evaluate "emulation required" on nested VM-Exit Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 30/46] KVM: SVM: Tweak order of cr0/cr4/efer writes at RESET/INIT Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 31/46] KVM: SVM: Drop redundant writes to vmcb->save.cr4 " Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 32/46] KVM: SVM: Stuff save->dr6 at during VMSA sync, not " Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 33/46] KVM: VMX: Skip pointless MSR bitmap update when setting EFER Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 34/46] KVM: VMX: Refresh list of user return MSRs after setting guest CPUID Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 35/46] KVM: VMX: Don't _explicitly_ reconfigure user return MSRs on vCPU INIT Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 36/46] KVM: x86: Move setting of sregs during vCPU RESET/INIT to common x86 Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 37/46] KVM: VMX: Remove obsolete MSR bitmap refresh at vCPU RESET/INIT Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 38/46] KVM: nVMX: Remove obsolete MSR bitmap refresh at nested transitions Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 39/46] KVM: VMX: Don't redo x2APIC MSR bitmaps when userspace filter is changed Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 40/46] KVM: VMX: Remove unnecessary initialization of msr_bitmap_mode Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 41/46] KVM: VMX: Smush x2APIC MSR bitmap adjustments into single function Sean Christopherson
2021-07-26 21:00 ` Paolo Bonzini
2021-07-26 22:21 ` Sean Christopherson
2021-07-26 22:22 ` Paolo Bonzini
2021-07-13 16:33 ` [PATCH v2 42/46] KVM: VMX: Remove redundant write to set vCPU as active at RESET/INIT Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 43/46] KVM: VMX: Move RESET-only VMWRITE sequences to init_vmcs() Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 44/46] KVM: SVM: Emulate #INIT in response to triple fault shutdown Sean Christopherson
2021-07-13 16:33 ` [PATCH v2 45/46] KVM: SVM: Drop redundant clearing of vcpu->arch.hflags at INIT/RESET Sean Christopherson
2021-07-20 4:36 ` Reiji Watanabe
2021-07-26 21:04 ` Paolo Bonzini
2021-07-13 16:33 ` [PATCH v2 46/46] KVM: x86: Preserve guest's CR0.CD/NW on INIT Sean Christopherson
2021-07-20 4:37 ` Reiji Watanabe
2021-07-27 0:01 ` Nadav Amit
2021-07-28 20:44 ` Sean Christopherson [this message]
2021-07-26 21:12 ` [PATCH v2 00/46] KVM: x86: vCPU RESET/INIT fixes and consolidation Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YQHBsbHYayhSJOSz@google.com \
--to=seanjc@google.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nadav.amit@gmail.com \
--cc=pbonzini@redhat.com \
--cc=reijiw@google.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox