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[82.30.61.225]) by smtp.gmail.com with ESMTPSA id d1sm5657617wrr.72.2021.10.21.10.12.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 10:12:56 -0700 (PDT) Date: Thu, 21 Oct 2021 18:12:53 +0100 From: "Dr. David Alan Gilbert" To: Borislav Petkov Cc: Michael Roth , Brijesh Singh , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: Re: [PATCH v6 08/42] x86/sev-es: initialize sev_status/features within #VC handler Message-ID: References: <20211008180453.462291-1-brijesh.singh@amd.com> <20211008180453.462291-9-brijesh.singh@amd.com> <20211018184003.3ob2uxcpd2rpee3s@amd.com> <20211020161023.hzbj53ehmzjrt4xd@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.0.7 (2021-05-04) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org * Borislav Petkov (bp@alien8.de) wrote: > On Thu, Oct 21, 2021 at 04:56:09PM +0100, Dr. David Alan Gilbert wrote: > > I can imagine a malicious hypervisor trying to return different cpuid > > answers to different threads or even the same thread at different times. > > Haha, I guess that will fail not because of SEV* but because of the > kernel not really being able to handle heterogeneous CPUIDs. My worry is if it fails cleanly or fails in a way an evil hypervisor can exploit. > > Well, the spec (AMD 56860 SEV spec) says: > > > > 'If firmware encounters a CPUID function that is in the standard or extended ranges, then the > > firmware performs a check to ensure that the provided output would not lead to an insecure guest > > state' > > > > so I take that 'firmware' to be the PSP; that wording doesn't say that > > it checks that the CPUID is identical, just that it 'would not lead to > > an insecure guest' - so a hypervisor could hide any 'no longer affected > > by' flag for all the CPUs in it's migration pool and the firmware > > shouldn't complain; so it should be OK to pessimise. > > AFAIU this, I think this would depend on "[t]he policy used by the > firmware to assess CPUID function output can be found in [PPR]." > > So if the HV sets the "no longer affected by" flag but the firmware > deems this set flag as insecure, I'm assuming the firmare will clear > it when it returns the CPUID leafs. I guess I need to go find that > policy... OK, so that bit is 8...21 Eax ext2eax bit 6 page 1-109 then 2.1.5.3 CPUID policy enforcement shows 8...21 EAX as 'bitmask' 'bits set in the GuestVal must also be set in HostVal. This is often applied to feature fields where each bit indicates support for a feature' So that's right isn't it? Dave > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette > -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK