From: Sean Christopherson <seanjc@google.com>
To: Maxim Levitsky <mlevitsk@redhat.com>
Cc: Chao Gao <chao.gao@intel.com>, Zeng Guang <guang.zeng@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
"Luck, Tony" <tony.luck@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Kim Phillips <kim.phillips@amd.com>,
Jarkko Sakkinen <jarkko@kernel.org>,
Jethro Beekman <jethro@fortanix.com>,
"Huang, Kai" <kai.huang@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Hu, Robert" <robert.hu@intel.com>
Subject: Re: [PATCH v5 7/8] KVM: VMX: Update PID-pointer table entry when APIC ID is changed
Date: Wed, 2 Feb 2022 23:23:58 +0000 [thread overview]
Message-ID: <YfsSjvnoQcfzdo68@google.com> (raw)
In-Reply-To: <YeClaZWM1cM+WLjH@google.com>
On Thu, Jan 13, 2022, Sean Christopherson wrote:
> On Tue, Jan 11, 2022, Maxim Levitsky wrote:
> > Both Intel and AMD's PRM also state that changing APIC ID is implementation
> > dependent.
> >
> > I vote to forbid changing apic id, at least in the case any APIC acceleration
> > is used, be that APICv or AVIC.
>
> That has my vote as well. For IPIv in particular there's not much concern with
> backwards compability, i.e. we can tie the behavior to enable_ipiv.
Hrm, it may not be that simple. There's some crusty (really, really crusty) code
in Linux's boot code that writes APIC_ID. IIUC, the intent is to play nice with
running a UP crash dump kernel on "BSP" that isn't "the BSP", e.g. has a non-zero
APIC ID.
static void __init apic_bsp_up_setup(void)
{
#ifdef CONFIG_X86_64
apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid));
#else
/*
* Hack: In case of kdump, after a crash, kernel might be booting
* on a cpu with non-zero lapic id. But boot_cpu_physical_apicid
* might be zero if read from MP tables. Get it from LAPIC.
*/
# ifdef CONFIG_CRASH_DUMP
boot_cpu_physical_apicid = read_apic_id();
# endif
#endif
}
The most helpful comment is in generic_processor_info():
/*
* boot_cpu_physical_apicid is designed to have the apicid
* returned by read_apic_id(), i.e, the apicid of the
* currently booting-up processor. However, on some platforms,
* it is temporarily modified by the apicid reported as BSP
* through MP table. Concretely:
*
* - arch/x86/kernel/mpparse.c: MP_processor_info()
* - arch/x86/mm/amdtopology.c: amd_numa_init()
*
* This function is executed with the modified
* boot_cpu_physical_apicid. So, disabled_cpu_apicid kernel
* parameter doesn't work to disable APs on kdump 2nd kernel.
*
* Since fixing handling of boot_cpu_physical_apicid requires
* another discussion and tests on each platform, we leave it
* for now and here we use read_apic_id() directly in this
* function, generic_processor_info().
*/
It's entirely possible that this path is unused in a KVM guest, but I don't think
we can know that with 100% certainty.
But I also completely agree that attempting to keep the tables up-to-date is ugly
and a waste of time and effort, e.g. as Maxim pointed out, the current AVIC code
is comically broken.
Rather than disallowing the write, what if we add yet another inhibit that disables
APICv if IPI virtualization is enabled and a vCPU has an APIC ID != vcpu_id? KVM
is equipped to handle the emulation, so it just means that a guest that's doing
weird things loses a big of performance.
next prev parent reply other threads:[~2022-02-02 23:24 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-31 14:28 [PATCH v5 0/8] IPI virtualization support for VM Zeng Guang
2021-12-31 14:28 ` [PATCH v5 1/8] x86/cpu: Add new VMX feature, Tertiary VM-Execution control Zeng Guang
2021-12-31 14:28 ` [PATCH v5 2/8] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation Zeng Guang
2021-12-31 14:28 ` [PATCH v5 3/8] KVM: VMX: Detect Tertiary VM-Execution control when setup VMCS config Zeng Guang
2021-12-31 14:28 ` [PATCH v5 4/8] KVM: VMX: dump_vmcs() reports tertiary_exec_control field as well Zeng Guang
2022-01-13 21:03 ` Sean Christopherson
2022-01-14 4:19 ` Zeng Guang
2022-01-20 1:06 ` Sean Christopherson
2022-01-20 5:34 ` Zeng Guang
2021-12-31 14:28 ` [PATCH v5 5/8] KVM: x86: Support interrupt dispatch in x2APIC mode with APIC-write VM exit Zeng Guang
2022-01-13 21:29 ` Sean Christopherson
2022-01-14 7:52 ` Zeng Guang
2022-01-14 17:34 ` Sean Christopherson
2022-01-15 2:08 ` Zeng Guang
2022-01-18 0:44 ` Yuan Yao
2022-01-18 3:06 ` Zeng Guang
2022-01-18 18:17 ` Sean Christopherson
2022-01-19 2:48 ` Zeng Guang
2021-12-31 14:28 ` [PATCH v5 6/8] KVM: VMX: enable IPI virtualization Zeng Guang
2022-01-13 21:47 ` Sean Christopherson
2022-01-14 5:36 ` Zeng Guang
2021-12-31 14:28 ` [PATCH v5 7/8] KVM: VMX: Update PID-pointer table entry when APIC ID is changed Zeng Guang
2022-01-05 19:13 ` Tom Lendacky
2022-01-06 1:44 ` Zeng Guang
2022-01-06 14:06 ` Tom Lendacky
2022-01-07 8:05 ` Zeng Guang
2022-01-07 8:31 ` Maxim Levitsky
2022-01-10 7:45 ` Chao Gao
2022-01-10 22:24 ` Maxim Levitsky
2022-01-13 22:19 ` Sean Christopherson
2022-01-14 2:58 ` Chao Gao
2022-01-14 8:17 ` Maxim Levitsky
2022-01-17 3:17 ` Chao Gao
2022-02-02 23:23 ` Sean Christopherson [this message]
2022-02-03 20:22 ` Sean Christopherson
2022-02-23 6:10 ` Chao Gao
2022-02-23 10:26 ` Maxim Levitsky
2022-01-14 0:22 ` Yuan Yao
2021-12-31 14:28 ` [PATCH v5 8/8] KVM: VMX: Resize PID-ponter table on demand for IPI virtualization Zeng Guang
2022-01-13 22:09 ` Sean Christopherson
2022-01-14 15:59 ` Zeng Guang
2022-01-14 16:18 ` Sean Christopherson
2022-01-17 15:04 ` Zeng Guang
2022-01-18 17:15 ` Sean Christopherson
2022-01-19 7:55 ` Zeng Guang
2022-01-20 1:01 ` Sean Christopherson
2022-01-24 16:40 ` Zeng Guang
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