From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 963B0C433EF for ; Mon, 7 Feb 2022 16:29:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244867AbiBGQ3Z (ORCPT ); Mon, 7 Feb 2022 11:29:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1388912AbiBGQSo (ORCPT ); Mon, 7 Feb 2022 11:18:44 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DE38FC0401CE for ; Mon, 7 Feb 2022 08:18:43 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9F06B11D4; Mon, 7 Feb 2022 08:18:43 -0800 (PST) Received: from monolith.localdoman (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CEF723F718; Mon, 7 Feb 2022 08:18:40 -0800 (PST) Date: Mon, 7 Feb 2022 16:18:51 +0000 From: Alexandru Elisei To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Andre Przywara , Christoffer Dall , Jintack Lim , Haibo Xu , Ganapatrao Kulkarni , Chase Conklin , "Russell King (Oracle)" , James Morse , Suzuki K Poulose , karl.heubaum@oracle.com, mihai.carabas@oracle.com, miguel.luis@oracle.com, kernel-team@android.com Subject: Re: [PATCH v6 25/64] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings Message-ID: References: <20220128121912.509006-1-maz@kernel.org> <20220128121912.509006-26-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220128121912.509006-26-maz@kernel.org> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Hi Marc, On Fri, Jan 28, 2022 at 12:18:33PM +0000, Marc Zyngier wrote: > From: Jintack Lim > > Forward the EL1 virtual memory register traps to the virtual EL2 if they > are not coming from the virtual EL2 and the virtual HCR_EL2.TVM or TRVM > bit is set. > > This is for recursive nested virtualization. > > Signed-off-by: Jintack Lim > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/sys_regs.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index ccd063d6cb69..edaf287c7ec9 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -351,6 +351,13 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu, > if (el12_reg(p) && forward_nv_traps(vcpu)) > return false; > > + if (!el12_reg(p)) { > + u64 bit = p->is_write ? HCR_TVM : HCR_TRVM; > + > + if (forward_traps(vcpu, bit)) > + return false; This part of the TVM bit description from the architecture manual (page D13-3290) got me really stumped for a while: "When HCR_EL2.TGE is 1, the PE ignores the value of this field for all purposes other than a direct read of this field". But I soon realized it's forbidden by the architecture to eret to EL1 when TGE is set, so all's good. I wonder why that part was added to the TVM bit description though. Regardless, the patch looks good to me: Reviewed-by: Alexandru Elisei Thanks, Alex > + } > + > /* We don't expect TRVM on the host */ > BUG_ON(!vcpu_is_el2(vcpu) && !p->is_write); > > -- > 2.30.2 >