From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0419BC433EF for ; Mon, 7 Feb 2022 16:46:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386337AbiBGQpF (ORCPT ); Mon, 7 Feb 2022 11:45:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1390871AbiBGQgf (ORCPT ); Mon, 7 Feb 2022 11:36:35 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AD306C0401CE for ; Mon, 7 Feb 2022 08:36:34 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5E4B311FB; Mon, 7 Feb 2022 08:36:34 -0800 (PST) Received: from monolith.localdoman (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8BEC23F718; Mon, 7 Feb 2022 08:36:31 -0800 (PST) Date: Mon, 7 Feb 2022 16:36:42 +0000 From: Alexandru Elisei To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Andre Przywara , Christoffer Dall , Jintack Lim , Haibo Xu , Ganapatrao Kulkarni , Chase Conklin , "Russell King (Oracle)" , James Morse , Suzuki K Poulose , karl.heubaum@oracle.com, mihai.carabas@oracle.com, miguel.luis@oracle.com, kernel-team@android.com Subject: Re: [PATCH v6 26/64] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting Message-ID: References: <20220128121912.509006-1-maz@kernel.org> <20220128121912.509006-27-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220128121912.509006-27-maz@kernel.org> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Jan 28, 2022 at 12:18:34PM +0000, Marc Zyngier wrote: > From: Jintack Lim > > Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the > virtual HCR_EL2.NV bit is set. Those registers are trapped when HCR_EL2.{NV,NV1} = {1,1}. They aren't trapped when only HCR_EL2.NV is set. > > This is for recursive nested virtualization. > > Signed-off-by: Jintack Lim > Signed-off-by: Marc Zyngier > --- > arch/arm64/include/asm/kvm_arm.h | 1 + > arch/arm64/include/asm/kvm_nested.h | 1 + > arch/arm64/kvm/emulate-nested.c | 5 +++++ > arch/arm64/kvm/sys_regs.c | 22 +++++++++++++++++++++- > 4 files changed, 28 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > index 8043827e7dc0..748c2b068d4e 100644 > --- a/arch/arm64/include/asm/kvm_arm.h > +++ b/arch/arm64/include/asm/kvm_arm.h > @@ -20,6 +20,7 @@ > #define HCR_AMVOFFEN (UL(1) << 51) > #define HCR_FIEN (UL(1) << 47) > #define HCR_FWB (UL(1) << 46) > +#define HCR_NV1 (UL(1) << 43) > #define HCR_NV (UL(1) << 42) > #define HCR_API (UL(1) << 41) > #define HCR_APK (UL(1) << 40) > diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h > index 37ff6458296d..82fc8b6c990b 100644 > --- a/arch/arm64/include/asm/kvm_nested.h > +++ b/arch/arm64/include/asm/kvm_nested.h > @@ -68,5 +68,6 @@ static inline u64 translate_cnthctl_el2_to_cntkctl_el1(u64 cnthctl) > int handle_wfx_nested(struct kvm_vcpu *vcpu, bool is_wfe); > extern bool forward_traps(struct kvm_vcpu *vcpu, u64 control_bit); > extern bool forward_nv_traps(struct kvm_vcpu *vcpu); > +extern bool forward_nv1_traps(struct kvm_vcpu *vcpu); > > #endif /* __ARM64_KVM_NESTED_H */ > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c > index 7dd98d6e96e0..0109dfd664dd 100644 > --- a/arch/arm64/kvm/emulate-nested.c > +++ b/arch/arm64/kvm/emulate-nested.c > @@ -33,6 +33,11 @@ bool forward_nv_traps(struct kvm_vcpu *vcpu) > return forward_traps(vcpu, HCR_NV); > } > > +bool forward_nv1_traps(struct kvm_vcpu *vcpu) > +{ > + return forward_traps(vcpu, HCR_NV1); > +} > + > static u64 kvm_check_illegal_exception_return(struct kvm_vcpu *vcpu, u64 spsr) > { > u64 mode = spsr & PSR_MODE_MASK; > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index edaf287c7ec9..31d739d59f67 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -288,6 +288,16 @@ static bool access_rw(struct kvm_vcpu *vcpu, > return true; > } > > +static bool access_vbar_el1(struct kvm_vcpu *vcpu, > + struct sys_reg_params *p, > + const struct sys_reg_desc *r) > +{ > + if (forward_nv1_traps(vcpu)) > + return false; > + > + return access_rw(vcpu, p, r); > +} > + > /* > * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized). > */ > @@ -1669,6 +1679,7 @@ static bool access_sp_el1(struct kvm_vcpu *vcpu, > return true; > } > > + Hm... extra newline? Thanks, Alex > static bool access_elr(struct kvm_vcpu *vcpu, > struct sys_reg_params *p, > const struct sys_reg_desc *r) > @@ -1676,6 +1687,9 @@ static bool access_elr(struct kvm_vcpu *vcpu, > if (el12_reg(p) && forward_nv_traps(vcpu)) > return false; > > + if (!el12_reg(p) && forward_nv1_traps(vcpu)) > + return false; > + > if (p->is_write) > vcpu_write_sys_reg(vcpu, p->regval, ELR_EL1); > else > @@ -1691,6 +1705,9 @@ static bool access_spsr(struct kvm_vcpu *vcpu, > if (el12_reg(p) && forward_nv_traps(vcpu)) > return false; > > + if (!el12_reg(p) && forward_nv1_traps(vcpu)) > + return false; > + > if (p->is_write) > __vcpu_sys_reg(vcpu, SPSR_EL1) = p->regval; > else > @@ -1706,6 +1723,9 @@ static bool access_spsr_el2(struct kvm_vcpu *vcpu, > if (el12_reg(p) && forward_nv_traps(vcpu)) > return false; > > + if (!el12_reg(p) && forward_nv1_traps(vcpu)) > + return false; > + > if (p->is_write) > vcpu_write_sys_reg(vcpu, p->regval, SPSR_EL2); > else > @@ -1914,7 +1934,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > { SYS_DESC(SYS_LORC_EL1), trap_loregion }, > { SYS_DESC(SYS_LORID_EL1), trap_loregion }, > > - { SYS_DESC(SYS_VBAR_EL1), access_rw, reset_val, VBAR_EL1, 0 }, > + { SYS_DESC(SYS_VBAR_EL1), access_vbar_el1, reset_val, VBAR_EL1, 0 }, > { SYS_DESC(SYS_DISR_EL1), NULL, reset_val, DISR_EL1, 0 }, > > { SYS_DESC(SYS_ICC_IAR0_EL1), write_to_read_only }, > -- > 2.30.2 >