Re: [PATCH v2 4/7] KVM: nVMX: Add a quirk for KVM tweaks to VMX control MSRs

Sean Christopherson
2022-02-07T18:12:14Z

On Fri, Feb 04, 2022, Oliver Upton wrote:
> KVM really has no business messing with the vCPU state. Nonetheless, it
> has become ABI for KVM to adjust certain bits of the VMX entry/exit
> control MSRs depending on the guest CPUID. Namely, the bits associated
> with the IA32_PERF_GLOBAL_CTRL and IA32_BNDCFGS MSRs were conditionally
> enabled if the guest CPUID allows for it.
>
> Allow userspace to opt-out of changes to VMX control MSRs by adding a
> new KVM quirk.
>
> Suggested-by: Sean Christopherson <seanjc@google.com>
> Signed-off-by: Oliver Upton <oupton@google.com>
> ---
> arch/x86/include/uapi/asm/kvm.h | 11 ++++++-----
> arch/x86/kvm/vmx/vmx.c | 3 +++
> 2 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h
> index bf6e96011dfe..acbab6a97fae 100644
> --- a/arch/x86/include/uapi/asm/kvm.h
> +++ b/arch/x86/include/uapi/asm/kvm.h
> @@ -428,11 +428,12 @@ struct kvm_sync_regs {
> struct kvm_vcpu_events events;
> };
>
> -#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
> -#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
> -#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
> -#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
> -#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
> +#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
> +#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
> +#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
> +#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
> +#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
> +#define KVM_X86_QUIRK_TWEAK_VMX_CTRL_MSRS (1 << 5)

I'd prefer we include msr_ia32_feature_control_valid_bits in this quirk, it should
be relatively easy to do since most of the modifications stem from
vmx_vcpu_after_set_cpuid(). vmx_setup_mce() is a bit odd, but IMO it's worth
excising as much crud as we can.

> #define KVM_STATE_NESTED_FORMAT_VMX 0
> #define KVM_STATE_NESTED_FORMAT_SVM 1
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 395787b7e7ac..60b1b76782e1 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -7231,6 +7231,9 @@ void nested_vmx_entry_exit_ctls_update(struct kvm_vcpu *vcpu)
> {
> struct vcpu_vmx *vmx = to_vmx(vcpu);
>
> + if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_TWEAK_VMX_CTRL_MSRS))
> + return;

Probably worth calling out that nested_vmx_cr_fixed1_bits_update() is intentionally
exempt from this "rule":

case MSR_IA32_VMX_CR0_FIXED1:
case MSR_IA32_VMX_CR4_FIXED1:
/*
* These MSRs are generated based on the vCPU's CPUID, so we
* do not support restoring them directly.
*/
return -EINVAL;

> +
> if (kvm_mpx_supported()) {
> bool mpx_enabled = guest_cpuid_has(vcpu, X86_FEATURE_MPX);
>
> --
> 2.35.0.263.gb82422642f-goog
>