From: Sean Christopherson <seanjc@google.com>
To: Zeng Guang <guang.zeng@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
Tony Luck <tony.luck@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Kim Phillips <kim.phillips@amd.com>,
Jarkko Sakkinen <jarkko@kernel.org>,
Jethro Beekman <jethro@fortanix.com>,
Kai Huang <kai.huang@intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
Robert Hu <robert.hu@intel.com>, Gao Chao <chao.gao@intel.com>,
Robert Hoo <robert.hu@linux.intel.com>
Subject: Re: [PATCH v7 2/8] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation
Date: Thu, 31 Mar 2022 22:27:06 +0000 [thread overview]
Message-ID: <YkYquqLOduNlQntZ@google.com> (raw)
In-Reply-To: <20220304080725.18135-3-guang.zeng@intel.com>
On Fri, Mar 04, 2022, Zeng Guang wrote:
> +#define BUILD_CONTROLS_SHADOW(lname, uname, bits) \
> +static inline \
> +void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \
> +{ \
> + if (vmx->loaded_vmcs->controls_shadow.lname != val) { \
> + vmcs_write##bits(uname, val); \
> + vmx->loaded_vmcs->controls_shadow.lname = val; \
> + } \
> +} \
> +static inline u##bits __##lname##_controls_get(struct loaded_vmcs *vmcs)\
> +{ \
> + return vmcs->controls_shadow.lname; \
> +} \
> +static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \
> +{ \
> + return __##lname##_controls_get(vmx->loaded_vmcs); \
> +} \
> +static inline \
Drop the newline, there's no need to split this across two lines. Aligning the
backslashes will mean they all poke past the 80 char soft limit, but that's totally
ok. The whole point of the line limit is to improve readability, and a trivial
runover is much less painful than a split function declaration. As a bonus, all
the backslashes are aligned, have leading whitespace, and still land on a tab stop :-)
#define BUILD_CONTROLS_SHADOW(lname, uname, bits) \
static inline void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \
{ \
if (vmx->loaded_vmcs->controls_shadow.lname != val) { \
vmcs_write##bits(uname, val); \
vmx->loaded_vmcs->controls_shadow.lname = val; \
} \
} \
static inline u##bits __##lname##_controls_get(struct loaded_vmcs *vmcs) \
{ \
return vmcs->controls_shadow.lname; \
} \
static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \
{ \
return __##lname##_controls_get(vmx->loaded_vmcs); \
} \
static inline void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \
{ \
lname##_controls_set(vmx, lname##_controls_get(vmx) | val); \
} \
static inline void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \
{ \
lname##_controls_set(vmx, lname##_controls_get(vmx) & ~val); \
}
With that fixed,
Reviewed-by: Sean Christopherson <seanjc@google.com>
> +void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \
> +{ \
> + lname##_controls_set(vmx, lname##_controls_get(vmx) | val); \
> +} \
> +static inline \
> +void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \
> +{ \
> + lname##_controls_set(vmx, lname##_controls_get(vmx) & ~val); \
> }
> -BUILD_CONTROLS_SHADOW(vm_entry, VM_ENTRY_CONTROLS)
> -BUILD_CONTROLS_SHADOW(vm_exit, VM_EXIT_CONTROLS)
> -BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL)
> -BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL)
> -BUILD_CONTROLS_SHADOW(secondary_exec, SECONDARY_VM_EXEC_CONTROL)
> +BUILD_CONTROLS_SHADOW(vm_entry, VM_ENTRY_CONTROLS, 32)
> +BUILD_CONTROLS_SHADOW(vm_exit, VM_EXIT_CONTROLS, 32)
> +BUILD_CONTROLS_SHADOW(pin, PIN_BASED_VM_EXEC_CONTROL, 32)
> +BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL, 32)
> +BUILD_CONTROLS_SHADOW(secondary_exec, SECONDARY_VM_EXEC_CONTROL, 32)
>
> /*
> * VMX_REGS_LAZY_LOAD_SET - The set of registers that will be updated in the
> --
> 2.27.0
>
next prev parent reply other threads:[~2022-03-31 22:27 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 8:07 [PATCH v7 0/8] IPI virtualization support for VM Zeng Guang
2022-03-04 8:07 ` [PATCH v7 1/8] x86/cpu: Add new VMX feature, Tertiary VM-Execution control Zeng Guang
2022-03-04 8:07 ` [PATCH v7 2/8] KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation Zeng Guang
2022-03-31 22:27 ` Sean Christopherson [this message]
2022-04-02 12:47 ` Zeng Guang
2022-03-04 8:07 ` [PATCH v7 3/8] KVM: VMX: Detect Tertiary VM-Execution control when setup VMCS config Zeng Guang
2022-03-31 22:41 ` Sean Christopherson
2022-04-02 12:58 ` Zeng Guang
2022-03-04 8:07 ` [PATCH v7 4/8] KVM: VMX: dump_vmcs() reports tertiary_exec_control field as well Zeng Guang
2022-03-31 22:46 ` Sean Christopherson
2022-04-02 13:09 ` Zeng Guang
2022-03-04 8:07 ` [PATCH v7 5/8] KVM: x86: Add support for vICR APIC-write VM-Exits in x2APIC mode Zeng Guang
2022-03-31 23:07 ` Sean Christopherson
2022-04-02 13:33 ` Zeng Guang
2022-04-04 15:29 ` Sean Christopherson
2022-03-04 8:07 ` [PATCH v7 6/8] KVM: x86: lapic: don't allow to change APIC ID unconditionally Zeng Guang
2022-03-04 8:07 ` [PATCH v7 7/8] KVM: x86: Allow userspace set maximum VCPU id for VM Zeng Guang
2022-04-01 2:01 ` Sean Christopherson
2022-04-03 10:17 ` Zeng Guang
2022-04-04 17:25 ` Sean Christopherson
2022-03-04 8:07 ` [PATCH v7 8/8] KVM: VMX: enable IPI virtualization Zeng Guang
2022-04-01 2:37 ` Sean Christopherson
2022-04-03 14:38 ` Zeng Guang
2022-04-04 17:57 ` Sean Christopherson
2022-04-08 16:41 ` Zeng Guang
2022-04-15 14:35 ` Sean Christopherson
2022-03-18 8:15 ` [PATCH v7 0/8] IPI virtualization support for VM Zeng Guang
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