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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id z1-20020a17090ab10100b001df93c8e737sm2244751pjq.39.2022.05.20.13.06.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 May 2022 13:06:13 -0700 (PDT) Date: Fri, 20 May 2022 20:06:09 +0000 From: Sean Christopherson To: Jon Kohler Cc: Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "x86@kernel.org" , "H. Peter Anvin" , Andrea Arcangeli , Josh Poimboeuf , Kees Cook , Waiman Long , "kvm@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] KVM: VMX: do not disable interception for MSR_IA32_SPEC_CTRL on eIBRS Message-ID: References: <20220512174427.3608-1-jon@nutanix.com> <29CDF294-5394-47C7-8B50-5F1FC101891C@nutanix.com> <732266F9-9904-434A-857F-847203901A0C@nutanix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <732266F9-9904-434A-857F-847203901A0C@nutanix.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, May 20, 2022, Jon Kohler wrote: > > > On May 18, 2022, at 10:23 AM, Jon Kohler wrote: > > > >> On May 17, 2022, at 9:42 PM, Sean Christopherson wrote: > >>> + if (boot_cpu_has(X86_FEATURE_IBRS_ENHANCED) && data == BIT(0)) { > >> > >> Use SPEC_CTRL_IBRS instead of open coding "BIT(0)", then a chunk of the comment > >> goes away. > >> > >>> + vmx->spec_ctrl = data; > >>> + break; > >>> + } > >> > >> There's no need for a separate if statement. And the boot_cpu_has() check can > >> be dropped, kvm_spec_ctrl_test_value() has already verified the bit is writable > >> (unless you're worried about bit 0 being used for something else?) > > I was (and am) worried about misbehaving guests on pre-eIBRS systems spamming IBRS > MSR, which we wouldn’t be able to see today. Intel’s guidance for eIBRS has long been > set it once and be done with it, so any eIBRS aware guest should behave nicely with that. > That limits the blast radius a bit here. Then check the guest capabilities, not the host flag. if (data == SPEC_CTRL_IBRS && (vcpu->arch.arch_capabilities & ARCH_CAP_IBRS_ALL)) > Sent out the v2 just now with a few minor tweaks, only notable one was keeping > the boot cpu check and small tweaks to comments here and there to suit. In the future, give reviewers a bit of time to respond to a contented point before sending out the next revision, e.g. you could have avoided v3 :-)