From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Maxim Levitsky <mlevitsk@redhat.com>,
kvm@vger.kernel.org, x86@kernel.org,
Borislav Petkov <bp@alien8.de>,
linux-kernel@vger.kernel.org,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Joerg Roedel <joro@8bytes.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Jim Mattson <jmattson@google.com>,
Wanpeng Li <wanpengli@tencent.com>,
"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] KVM: x86: preserve interrupt shadow across SMM entries
Date: Tue, 7 Jun 2022 19:22:13 +0000 [thread overview]
Message-ID: <Yp+lZahfgYYlA9U9@google.com> (raw)
In-Reply-To: <2c561959-2382-f668-7cb8-01d17d627dd6@redhat.com>
On Tue, Jun 07, 2022, Paolo Bonzini wrote:
> On 6/7/22 17:16, Maxim Levitsky wrote:
> > If the #SMI happens while the vCPU is in the interrupt shadow,
> > (after STI or MOV SS),
> > we must both clear it to avoid VM entry failure on VMX,
> > due to consistency check vs EFLAGS.IF which is cleared on SMM entries,
> > and restore it on RSM so that #SMI is transparent to the non SMM code.
> >
> > To support migration, reuse upper 4 bits of
> > 'kvm_vcpu_events.interrupt.shadow' to store the smm interrupt shadow.
> >
> > This was lightly tested with a linux guest and smm load script,
> > and a unit test will be soon developed to test this better.
> >
> > For discussion: there are other ways to fix this issue:
> >
> > 1. The SMM shadow can be stored in SMRAM at some unused
> > offset, this will allow to avoid changes to kvm_vcpu_ioctl_x86_set_vcpu_events
>
> Yes, that would be better (and would not require a new cap).
At one point do we chalk up SMM emulation as a failed experiment and deprecate
support? There are most definitely more bugs lurking in KVM's handling of
save/restore across SMI+RSM.
> > 2. #SMI can instead be blocked while the interrupt shadow is active,
> > which might even be what the real CPU does, however since neither VMX
> > nor SVM support SMM window handling, this will involve single stepping
> > the guest like it is currently done on SVM for the NMI window in some cases.
FWIW, blocking SMI in STI/MOVSS shadows is explicitly allowed by the Intel SDM.
IIRC, modern Intel CPUs block SMIs in MOVSS shadows but not STI shadows.
next prev parent reply other threads:[~2022-06-07 22:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 15:16 [PATCH] KVM: x86: preserve interrupt shadow across SMM entries Maxim Levitsky
2022-06-07 15:23 ` Paolo Bonzini
2022-06-07 19:22 ` Sean Christopherson [this message]
2022-06-08 8:52 ` Maxim Levitsky
2022-06-08 14:43 ` Sean Christopherson
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