From: Sean Christopherson <seanjc@google.com>
To: Maxim Levitsky <mlevitsk@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Li RongQing <lirongqing@baidu.com>
Subject: Re: [PATCH v2 04/23] KVM: x86: Inhibit AVIC SPTEs if any vCPU enables x2APIC
Date: Tue, 20 Sep 2022 16:50:51 +0000 [thread overview]
Message-ID: <Yynva7GV+XpU0Llx@google.com> (raw)
In-Reply-To: <Yyngcg3ainoD0fNc@google.com>
On Tue, Sep 20, 2022, Sean Christopherson wrote:
> On Tue, Sep 20, 2022, Maxim Levitsky wrote:
> > On Sat, 2022-09-03 at 00:22 +0000, Sean Christopherson wrote:
> > > Reintroduce APICV_INHIBIT_REASON_X2APIC as a "partial" inhibit for AMD
> > > to fix a bug where the APIC access page is visible to vCPUs that have
> > > x2APIC enabled, i.e. shouldn't be able to "see" the xAPIC MMIO region.
> > >
> > > On AMD, due to its "hybrid" mode where AVIC is enabled when x2APIC is
> > > enabled even without x2AVIC support, the bug occurs any time AVIC is
> > > enabled as x2APIC is fully emulated by KVM. I.e. hardware isn't aware
> > > that the guest is operating in x2APIC mode.
> > >
> > > Opportunistically drop the "can" while updating avic_activate_vmcb()'s
> > > comment, i.e. to state that KVM _does_ support the hybrid mode. Move
> > > the "Note:" down a line to conform to preferred kernel/KVM multi-line
> > > comment style.
> > >
> > > Leave Intel as-is for now to avoid a subtle performance regression, even
> > > though Intel likely suffers from the same bug. On Intel, in theory the
> > > bug rears its head only when vCPUs share host page tables (extremely
> > > likely) and x2APIC enabling is not consistent within the guest, i.e. if
> > > some vCPUs have x2APIC enabled and other does do not (unlikely to occur
> > > except in certain situations, e.g. bringing up APs).
> >
> > Are you sure about this?
>
> Ah, no. The key on Intel is the separate VMCS control for virtualizing xAPIC
> accesses. As you note below, KVM will provide memory semantics, which is technically
> wrong.
>
> > This is what I am thinking will happen, I might be wrong but I am not sure:
>
> ...
>
> > 3. guest accesses the 0xfee00xxx, assuming APICv/x2avic, the hardware won't redirect
> > the access to apic backing page, but will instead just use that SPTE and let the guest
> > read/write the private page that we mapped in the range, which is wrong.
> >
> > Am I missing something?
>
> No, I don't believe so. I'm still hesitant to add the effetive inhibit to Intel,
> though that's probably just pure paranoia at this point. Probably makes sense to
> just do it and verify that x2APIC virtualization still works.
Scratch that, Intel can end up with memory semantics irrespective of x2APIC, e.g.
if APICv is enabled but a vCPU disables its APIC. We could force a bus error by
inhibiting APICv if any vCPU has its APIC hardware disabled, but IMO that's a bad
tradeoff as there are legitimate reasons to disable the APIC on select vCPUs.
So, I'll omit Intel from the x2APIC pseudo-inhibit, and maybe add a KVM erratum
to document that KVM may provide memory semantics for APIC_BASE when APICv/AVIC
is enabled.
next prev parent reply other threads:[~2022-09-20 16:51 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-03 0:22 [PATCH v2 00/23] KVM: x86: AVIC and local APIC fixes+cleanups Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 01/23] KVM: x86: Purge "highest ISR" cache when updating APICv state Sean Christopherson
2022-09-05 21:58 ` Paolo Bonzini
2022-09-03 0:22 ` [PATCH v2 02/23] KVM: SVM: Flush the "current" TLB when activating AVIC Sean Christopherson
2022-09-05 21:58 ` Paolo Bonzini
2022-09-03 0:22 ` [PATCH v2 03/23] KVM: SVM: Process ICR on AVIC IPI delivery failure due to invalid target Sean Christopherson
2022-09-05 21:59 ` Paolo Bonzini
2022-09-03 0:22 ` [PATCH v2 04/23] KVM: x86: Inhibit AVIC SPTEs if any vCPU enables x2APIC Sean Christopherson
2022-09-05 22:02 ` Paolo Bonzini
2022-09-13 19:52 ` Suthikulpanit, Suravee
2022-09-14 7:39 ` Sean Christopherson
2022-09-14 17:41 ` Suthikulpanit, Suravee
2022-09-16 17:47 ` Sean Christopherson
2022-09-16 19:10 ` Sean Christopherson
2022-09-20 13:07 ` Maxim Levitsky
2022-09-20 15:46 ` Sean Christopherson
2022-09-20 16:50 ` Sean Christopherson [this message]
2022-09-23 10:18 ` Maxim Levitsky
2022-09-23 10:19 ` Maxim Levitsky
2022-09-03 0:22 ` [PATCH v2 05/23] KVM: SVM: Don't put/load AVIC when setting virtual APIC mode Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 06/23] KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 07/23] KVM: SVM: Compute dest based on sender's x2APIC status for AVIC kick Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 08/23] KVM: SVM: Fix x2APIC Logical ID calculation for avic_kick_target_vcpus_fast Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 09/23] Revert "KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible" Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 10/23] KVM: SVM: Document that vCPU ID == APIC ID in AVIC kick fastpatch Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 11/23] KVM: SVM: Add helper to perform final AVIC "kick" of single vCPU Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 12/23] KVM: x86: Disable APIC logical map if logical ID covers multiple MDAs Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 13/23] KVM: x86: Disable APIC logical map if vCPUs are aliased in logical mode Sean Christopherson
2022-09-13 23:32 ` Suthikulpanit, Suravee
2022-09-14 7:42 ` Sean Christopherson
2022-09-15 2:11 ` Suthikulpanit, Suravee
2022-09-16 18:52 ` Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 14/23] KVM: x86: Honor architectural behavior for aliased 8-bit APIC IDs Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 15/23] KVM: x86: Explicitly skip adding vCPU to optimized logical map if LDR==0 Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 16/23] KVM: x86: Explicitly track all possibilities for APIC map's logical modes Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 17/23] KVM: SVM: Inhibit AVIC if vCPUs are aliased in logical mode Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 18/23] KVM: SVM: Always update local APIC on writes to logical dest register Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 19/23] KVM: SVM: Update svm->ldr_reg cache even if LDR is "bad" Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 20/23] KVM: SVM: Require logical ID to be power-of-2 for AVIC entry Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 21/23] KVM: SVM: Handle multiple logical targets in AVIC kick fastpath Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 22/23] KVM: SVM: Ignore writes to Remote Read Data on AVIC write traps Sean Christopherson
2022-09-03 0:22 ` [PATCH v2 23/23] Revert "KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu" Sean Christopherson
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