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Wed, 02 Apr 2025 19:57:34 -0700 (PDT) Received: from archie.me ([103.124.138.155]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-739d97ee601sm309000b3a.48.2025.04.02.19.57.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Apr 2025 19:57:33 -0700 (PDT) Received: by archie.me (Postfix, from userid 1000) id 082684208F7B; Thu, 03 Apr 2025 09:57:29 +0700 (WIB) Date: Thu, 3 Apr 2025 09:57:29 +0700 From: Bagas Sanjaya To: Josh Poimboeuf , x86@kernel.org Cc: linux-kernel@vger.kernel.org, amit@kernel.org, kvm@vger.kernel.org, amit.shah@amd.com, thomas.lendacky@amd.com, bp@alien8.de, tglx@linutronix.de, peterz@infradead.org, pawan.kumar.gupta@linux.intel.com, corbet@lwn.net, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, daniel.sneddon@linux.intel.com, kai.huang@intel.com, sandipan.das@amd.com, boris.ostrovsky@oracle.com, Babu.Moger@amd.com, david.kaplan@amd.com, dwmw@amazon.co.uk, andrew.cooper3@citrix.com Subject: Re: [PATCH v3 6/6] x86/bugs: Add RSB mitigation document Message-ID: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="Vthr334gw0e4SDNm" Content-Disposition: inline In-Reply-To: --Vthr334gw0e4SDNm Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Apr 02, 2025 at 11:19:23AM -0700, Josh Poimboeuf wrote: > + Note that some Intel CPUs are susceptible to Post-barrier Return > + Stack Buffer Predictions (PBRSB)[#intel-pbrsb]_, where the last CALL > + from the guest can be used to predict the first unbalanced RET. In > + this case the PBRSB mitigation is needed in addition to eIBRS. I get Sphinx unreferenced footnote warning: Documentation/admin-guide/hw-vuln/rsb.rst:221: WARNING: Footnote [#] is not= referenced. [ref.footnote] To fix that, I have to separate the footnote: ---- >8 ---- diff --git a/Documentation/admin-guide/hw-vuln/rsb.rst b/Documentation/admi= n-guide/hw-vuln/rsb.rst index 97bf75993d5d43..dd727048b00204 100644 --- a/Documentation/admin-guide/hw-vuln/rsb.rst +++ b/Documentation/admin-guide/hw-vuln/rsb.rst @@ -102,7 +102,7 @@ there are unbalanced CALLs/RETs after a context switch = or VMEXIT. at the time of the VM exit." [#intel-eibrs-vmexit]_ =20 Note that some Intel CPUs are susceptible to Post-barrier Return - Stack Buffer Predictions (PBRSB)[#intel-pbrsb]_, where the last CALL + Stack Buffer Predictions (PBRSB) [#intel-pbrsb]_, where the last CALL from the guest can be used to predict the first unbalanced RET. In this case the PBRSB mitigation is needed in addition to eIBRS. =20 Thanks. --=20 An old man doll... just what I always wanted! - Clara --Vthr334gw0e4SDNm Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCZ+35EgAKCRD2uYlJVVFO o9/gAQCqoWK4zcdHIqqsmVjYK3VSGR9Ma0vT5fEDQM/vBa2FGgEAnBkyobxju0X2 IG/L2mIqeJDvICypkkcH/f/LixkOLwU= =MU3h -----END PGP SIGNATURE----- --Vthr334gw0e4SDNm--