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AJvYcCXOiY3706SHOwju/ZfMtBZd+uEtHCJSMIDGGowDHS5ipZCzZ2mSgqZk1dcknu2g3aEdkOM=@vger.kernel.org X-Gm-Message-State: AOJu0YwadCeQz2+KAz/LunZz+y5Y6QMgR/j4Bj8NrGS37JLzLkXMdosO FC2sdwowr7JG0naGA4ZZMzhbvZMeWdNtcyDXy6M14DcPgLRaoJUIH07VA2/iMt02UyoPIQqu1T/ oJg== X-Google-Smtp-Source: AGHT+IGGMam9T8WozeRkBPD4Zm4Ke69jphYD5viKBJMLvC6WDpQ9ldVOH0lnViHJMtvgvrrUpiHczcFTs7o= X-Received: from pfbdr9.prod.google.com ([2002:a05:6a00:4a89:b0:736:a983:dc43]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:aa7:88cb:0:b0:736:d297:164 with SMTP id d2e1a72fcca58-73960e0bd64mr5021035b3a.1.1743085149770; Thu, 27 Mar 2025 07:19:09 -0700 (PDT) Date: Thu, 27 Mar 2025 07:19:07 -0700 In-Reply-To: <87msd6y8a7.ffs@tglx> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250226090525.231882-1-Neeraj.Upadhyay@amd.com> <20250226090525.231882-14-Neeraj.Upadhyay@amd.com> <87cyea2xxi.ffs@tglx> <87y0wqycj8.ffs@tglx> <87msd6y8a7.ffs@tglx> Message-ID: Subject: Re: [RFC v2 13/17] x86/apic: Handle EOI writes for SAVIC guests From: Sean Christopherson To: Thomas Gleixner Cc: Neeraj Upadhyay , linux-kernel@vger.kernel.org, bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com, Thomas.Lendacky@amd.com, nikunj@amd.com, Santosh.Shukla@amd.com, Vasant.Hegde@amd.com, Suravee.Suthikulpanit@amd.com, David.Kaplan@amd.com, x86@kernel.org, hpa@zytor.com, peterz@infradead.org, pbonzini@redhat.com, kvm@vger.kernel.org, kirill.shutemov@linux.intel.com, huibo.wang@amd.com, naveen.rao@amd.com Content-Type: text/plain; charset="us-ascii" On Thu, Mar 27, 2025, Thomas Gleixner wrote: > On Thu, Mar 27 2025 at 11:48, Thomas Gleixner wrote: > > > On Fri, Mar 21 2025 at 10:11, Sean Christopherson wrote: > >> On Fri, Mar 21, 2025, Thomas Gleixner wrote: > >>> > >>> Congrats. You managed to re-implement find_last_bit() in the most > >>> incomprehesible way. > >> > >> Heh, having burned myself quite badly by trying to use find_last_bit() to get > >> pending/in-service IRQs in KVM code... > >> > >> Using find_last_bit() doesn't work because the ISR chunks aren't contiguous, > >> they're 4-byte registers at 16-byte strides. > > > > Which is obvious to solve with trivial integer math: > > > > bit = vector + 32 * (vector / 32); > > > > ergo > > > > vector = bit - 16 * (bit / 32); > > > > No? > > Actually no. As this is for 8 byte alignment. For 16 byte it's > > bit = vector + 96 * (vector / 32); > ergo > vector = bit - 24 * (bit / 32); > > Which is still just shifts and add/sub. IIUC, the suggestion is to use find_last_bit() to walk the entire 128-byte range covered by ISR registers, under the assumption that the holes are guaranteed to be zero. I suppose that works for Secure AVIC, but I don't want to do that for KVM since KVM can't guarantee the holes are zero (userspace can stuff APIC state).