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AJvYcCUl4HRrKxnNvNPR3tj9JgStbbX0osMXFbwXrwaSk8p39qRi3RVvkAHAx22zA1+1KqZztvY=@vger.kernel.org X-Gm-Message-State: AOJu0YxgzsL0s2S3Y2kVRLfGrvx571HRw0b2f/9aRRqTa4217+qmXjK/ 9nl320eCoFUvTzVfa3bdqub40cUCK0ezTGOHszJQdgnAkiPlZksiUEbXzyR4bDoIsZsL/Ck/0wU VBA== X-Google-Smtp-Source: AGHT+IFuFDQHohRURdGRM189Pt9qL9Zaf73obsIvszIqilIxE8UnhMz921eOxrXQXTzRVL84A/vW1JH77EE= X-Received: from pjuw5.prod.google.com ([2002:a17:90a:d605:b0:2ea:a9d9:c9d1]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:17cd:b0:2ea:6f96:64fd with SMTP id 98e67ed59e1d1-2eb0e890c17mr14474024a91.34.1732547968816; Mon, 25 Nov 2024 07:19:28 -0800 (PST) Date: Mon, 25 Nov 2024 07:19:27 -0800 In-Reply-To: <86d71f0c-6859-477a-88a2-416e46847f2f@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241121201448.36170-1-adrian.hunter@intel.com> <86d71f0c-6859-477a-88a2-416e46847f2f@linux.intel.com> Message-ID: Subject: Re: [PATCH 0/7] KVM: TDX: TD vcpu enter/exit From: Sean Christopherson To: Binbin Wu Cc: Adrian Hunter , pbonzini@redhat.com, dave.hansen@linux.intel.com, kvm@vger.kernel.org, rick.p.edgecombe@intel.com, kai.huang@intel.com, reinette.chatre@intel.com, xiaoyao.li@intel.com, tony.lindgren@linux.intel.com, dmatlack@google.com, isaku.yamahata@intel.com, nik.borisov@suse.com, linux-kernel@vger.kernel.org, x86@kernel.org, yan.y.zhao@intel.com, chao.gao@intel.com, weijiang.yang@intel.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Mon, Nov 25, 2024, Binbin Wu wrote: > On 11/22/2024 4:14 AM, Adrian Hunter wrote: > [...] > > - tdx_vcpu_enter_exit() calls guest_state_enter_irqoff() > > and guest_state_exit_irqoff() which comments say should be > > called from non-instrumentable code but noinst was removed > > at Sean's suggestion: > > https://lore.kernel.org/all/Zg8tJspL9uBmMZFO@google.com/ > > noinstr is also needed to retain NMI-blocking by avoiding > > instrumented code that leads to an IRET which unblocks NMIs. > > A later patch set will deal with NMI VM-exits. > >=20 > In https://lore.kernel.org/all/Zg8tJspL9uBmMZFO@google.com, Sean mentione= d: > "The reason the VM-Enter flows for VMX and SVM need to be noinstr is they= do things > like load the guest's CR2, and handle NMI VM-Exits with NMIs blocks.=C2= =A0 None of > that applies to TDX.=C2=A0 Either that, or there are some massive bugs lu= rking due to > missing code." >=20 > I don't understand why handle NMI VM-Exits with NMIs blocks doesn't apply= to > TDX.=C2=A0 IIUIC, similar to VMX, TDX also needs to handle the NMI VM-exi= t in the > noinstr section to avoid the unblock of NMIs due to instrumentation-induc= ed > fault. With TDX, SEAMCALL is mechnically a VM-Exit. KVM is the "guest" running in= VMX root mode, and the TDX-Module is the "host", running in SEAM root mode. And for TDH.VP.ENTER, if a hardware NMI arrives with the TDX guest is activ= e, the initial NMI VM-Exit, which consumes the NMI and blocks further NMIs, go= es from SEAM non-root to SEAM root. The SEAMRET from SEAM root to VMX root (K= VM) is effectively a VM-Enter, and does NOT block NMIs in VMX root (at least, A= FAIK). So trying to handle the NMI "exit" in a noinstr section is pointless becaus= e NMIs are never blocked. TDX is also different because KVM isn't responsible for context switching g= uest state. Specifically, CR2 is managed by the TDX Module, and so there is no = window where KVM runs with guest CR2, and thus there is no risk of clobbering gues= t CR2 with a host value, e.g. due to take a #PF due instrumentation triggering so= mething. All that said, I did forget that code that runs between guest_state_enter_i= rqoff() and guest_state_exit_irqoff() can't be instrumeneted. And at least as of p= atch 2 in this series, the simplest way to make that happen is to tag tdx_vcpu_ent= er_exit() as noinstr. Just please make sure nothing else is added in the noinstr sec= tion unless it absolutely needs to be there.