Re: [PATCH v1 00/13] KVM: Introduce KVM Userfault

James Houghton
2025-01-16T23:05:22Z

On Thu, Jan 16, 2025 at 2:16 PM Sean Christopherson <seanjc@google.com> wrote:
>
> On Thu, Jan 16, 2025, Peter Xu wrote:
> > On Thu, Jan 16, 2025 at 03:19:49PM -0500, Peter Xu wrote:
> > > > For the gmem case, userfaultfd cannot be used, so KVM Userfault isn't
> > > > replacing it. And as of right now anyway, KVM Userfault *does* provide
> > > > a complete post-copy system for gmem.
> > > >
> > > > When gmem pages can be mapped into userspace, for post-copy to remain
> > > > functional, userspace-mapped gmem will need userfaultfd integration.
> > > > Keep in mind that even after this integration happens, userfaultfd
> > > > alone will *not* be a complete post-copy solution, as vCPU faults
> > > > won't be resolved via the userspace page tables.
> > >
> > > Do you know in context of CoCo, whether a private page can be accessed at
> > > all outside of KVM?
> > >
> > > I think I'm pretty sure now a private page can never be mapped to
> > > userspace. However, can another module like vhost-kernel access it during
> > > postcopy? My impression of that is still a yes, but then how about
> > > vhost-user?
> > >
> > > Here, the "vhost-kernel" part represents a question on whether private
> > > pages can be accessed at all outside KVM. While "vhost-user" part
> > > represents a question on whether, if the previous vhost-kernel question
> > > answers as "yes it can", such access attempt can happen in another
> > > process/task (hence, not only does it lack KVM context, but also not
> > > sharing the same task context).
> >
> > Right after I sent it, I just recalled whenever a device needs to access
> > the page, it needs to be converted to shared pages first..
>
> FWIW, once Trusted I/O comes along, "trusted" devices will be able to access guest
> private memory. The basic gist is that the IOMMU will enforce access to private
> memory, e.g. on AMD the IOMMU will check the RMP[*], and I believe the plan for
> TDX is to have the IOMMU share the Secure-EPT tables that are used by the CPU.
>
> [*] https://www.amd.com/content/dam/amd/en/documents/developer/sev-tio-whitepaper.pdf

Hi Sean,

Do you know what API the IOMMU driver would use to get the private
pages to map? Normally it'd use GUP, but GUP would/should fail for
guest-private pages, right?