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AJvYcCUhKiDe9qoOPVAzWQasepb7dGwdOGPIcrKalZj1Z84iTyQTKXND/xUXrWJ1pCNUdGX33Bs=@vger.kernel.org X-Gm-Message-State: AOJu0YzoaDPLG1FXXY4WcYDPBFdQEhXlG/p8cvL2ZafjQ+kDUmY2dxN9 nMRgIHTXojremA1BNd72bkCyJF5RkKWc36BQhF24yd/RSK3GC1RnOpRc0adfB0CFZie11IguNDY SrQ== X-Google-Smtp-Source: AGHT+IFfiIZ2DEso+N+paKeu5OgQzYFebfjWCB9EVzOGCvy3Mzjrl//YuPs2vfH++icWQIO/ZuqrhAgLnYk= X-Received: from pfx23.prod.google.com ([2002:a05:6a00:a457:b0:730:7921:292a]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:1591:b0:1e1:9b77:e237 with SMTP id adf61e73a8af0-1ee5c88f0abmr10648015637.40.1739398162979; Wed, 12 Feb 2025 14:09:22 -0800 (PST) Date: Wed, 12 Feb 2025 14:09:21 -0800 In-Reply-To: <20250204004038.1680123-6-jthoughton@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250204004038.1680123-1-jthoughton@google.com> <20250204004038.1680123-6-jthoughton@google.com> Message-ID: Subject: Re: [PATCH v9 05/11] KVM: x86/mmu: Rename spte_has_volatile_bits() to spte_needs_atomic_write() From: Sean Christopherson To: James Houghton Cc: Paolo Bonzini , David Matlack , David Rientjes , Marc Zyngier , Oliver Upton , Wei Xu , Yu Zhao , Axel Rasmussen , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" On Tue, Feb 04, 2025, James Houghton wrote: > spte_has_volatile_bits() is now a misnomer, as the an SPTE can have its > Accessed bit set or cleared without the mmu_lock held, but the state of > the Accessed bit is not checked in spte_has_volatile_bits(). > Even if a caller uses spte_needs_atomic_write(), Accessed bit > information may still be lost, but that is already tolerated, as the TLB > is not invalidated after the Accessed bit is cleared. > > Signed-off-by: James Houghton > --- ... > diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h > index 59746854c0af..4c290ae9a02a 100644 > --- a/arch/x86/kvm/mmu/spte.h > +++ b/arch/x86/kvm/mmu/spte.h > @@ -519,7 +519,7 @@ static inline u64 get_mmio_spte_generation(u64 spte) > return gen; > } > > -bool spte_has_volatile_bits(u64 spte); > +bool spte_needs_atomic_write(u64 spte); > > bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, > const struct kvm_memory_slot *slot, > diff --git a/arch/x86/kvm/mmu/tdp_iter.h b/arch/x86/kvm/mmu/tdp_iter.h > index 05e9d678aac9..b54123163efc 100644 > --- a/arch/x86/kvm/mmu/tdp_iter.h > +++ b/arch/x86/kvm/mmu/tdp_iter.h > @@ -55,7 +55,7 @@ static inline bool kvm_tdp_mmu_spte_need_atomic_write(u64 old_spte, int level) > { > return is_shadow_present_pte(old_spte) && > is_last_spte(old_spte, level) && > - spte_has_volatile_bits(old_spte); > + spte_needs_atomic_write(old_spte); Unless you object, I'll change this to spte_needs_atomic_update(), and tweak kvm_tdp_mmu_spte_need_atomic_write() accordingly. "write" was a bad choice by me. It's not just the store/write that needs to be atomic, it's the entire read-modify-write. E.g. KVM needs to preserve the existing value, but for many flows, it's even more important that KVM's snapshot of the old SPTE is accurate. > } > > static inline u64 kvm_tdp_mmu_write_spte(tdp_ptep_t sptep, u64 old_spte, > -- > 2.48.1.362.g079036d154-goog >