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From: Zhao Liu <zhao1.liu@intel.com>
To: Markus Armbruster <armbru@redhat.com>
Cc: "Daniel P. Berrang�" <berrange@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Eric Blake" <eblake@redhat.com>,
	"Michael Roth" <michael.roth@amd.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Shaoqin Huang" <shahuang@redhat.com>,
	"Eric Auger" <eauger@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Sebastian Ott" <sebott@redhat.com>,
	"Gavin Shan" <gshan@redhat.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-arm@nongnu.org,
	"Dapeng Mi" <dapeng1.mi@intel.com>, "Yi Lai" <yi1.lai@intel.com>
Subject: Re: [RFC v2 3/5] i386/kvm: Support event with select & umask format in KVM PMU filter
Date: Thu, 6 Feb 2025 22:54:41 +0800	[thread overview]
Message-ID: <Z6TNMZbonWmsnyM7@intel.com> (raw)
In-Reply-To: <Z6TFr49Cnhe1s4/5@intel.com>

> > Do users need to know how to compute the raw event value from @select
> > and @umask?
> 
> Yes, because it's also a unified calculation. AMD and Intel have
> differences in bits for supported select field, but this calculation
> (which follows from the KVM code) makes both compatible.
> 
> > If yes, is C code the best way?

Sorry, I missed this line. In this patch, there's macro:

+#define X86_PMU_RAW_EVENT(eventsel, umask) (((eventsel & 0xf00UL) << 24) | \
+                                            ((eventsel) & 0xff) | \
+                                            ((umask) & 0xff) << 8)

So could I said something like the following?

+##
+# @KVMPMUX86SelectUmaskEvent:
+#
+# x86 PMU event encoding with select and umask.  Using the X86_PMU_RAW_EVENT
+# macro, the select and umask fields will be encoded into raw foramt and
+# delivered to KVM.
+#
+# @select: x86 PMU event select field, which is a 12-bit unsigned
+#     number.
+#
+# @umask: x86 PMU event umask field.
+#
+# Since 10.0
+##
+{ 'struct': 'KVMPMUX86DefalutEvent',
+  'data': { 'select': 'uint16',
+            'umask': 'uint8' } }
+

Thanks very much!

> > Here's another way:
> > 
> >     bits  0..7 : bits 0..7 of @select
> >     bits  8..15: @umask
> >     bits 24..27: bits 8..11 of @select
> >     all other bits: zero
> >
> 
> Thank you! This is what I want.
> 
> 
> 

  reply	other threads:[~2025-02-06 14:38 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-22  9:05 [RFC v2 0/5] accel/kvm: Support KVM PMU filter Zhao Liu
2025-01-22  9:05 ` [RFC v2 1/5] qapi/qom: Introduce kvm-pmu-filter object Zhao Liu
2025-02-05 10:03   ` Markus Armbruster
2025-02-06 10:19     ` Zhao Liu
2025-02-06 10:27       ` Zhao Liu
2025-02-06 12:13       ` Markus Armbruster
2025-02-06 14:32         ` Zhao Liu
2025-02-07 13:02           ` Markus Armbruster
2025-04-01  7:47             ` Zhao Liu
2025-04-08  5:51               ` Markus Armbruster
2025-01-22  9:05 ` [RFC v2 2/5] i386/kvm: Support basic KVM PMU filter Zhao Liu
2025-01-22  9:05 ` [RFC v2 3/5] i386/kvm: Support event with select & umask format in " Zhao Liu
2025-02-05 10:07   ` Markus Armbruster
2025-02-06  9:54     ` Zhao Liu
2025-02-06  9:42       ` Daniel P. Berrangé
2025-02-06 10:23         ` Zhao Liu
2025-02-06 10:24         ` Markus Armbruster
2025-02-06 14:22           ` Zhao Liu
2025-02-06 14:54             ` Zhao Liu [this message]
2025-02-07 13:06               ` Markus Armbruster
2025-04-01  7:53                 ` Zhao Liu
2025-01-22  9:05 ` [RFC v2 4/5] i386/kvm: Support event with masked entry " Zhao Liu
2025-01-22  9:05 ` [RFC v2 5/5] i386/kvm: Support fixed counter " Zhao Liu
2025-01-24  8:00 ` [RFC v2 0/5] accel/kvm: Support " Lai, Yi
2025-03-18  7:35 ` Shaoqin Huang
2025-03-21  3:43   ` Zhao Liu
2025-03-31  6:32     ` Shaoqin Huang

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