* [GIT PULL] KVM/arm64 updates for 6.15
@ 2025-03-20 4:29 Oliver Upton
2025-03-20 12:59 ` Marc Zyngier
0 siblings, 1 reply; 5+ messages in thread
From: Oliver Upton @ 2025-03-20 4:29 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Marc Zyngier, kvm, kvmarm, Akihiko Odaki, Will Deacon,
Vincent Donnefort, Sebastian Ott, Shameer Kolothum, Fuad Tabba
Hi Paolo,
Here's the latest pile o' patches for 6.15. The pull is based on a later
-rc than I usually aim for to handle some conflicts with fixes that went
in 6.14, but all of these patches have had exposure in -next for a good
while.
There was a small conflict with the arm perf tree, which was addressed
by Will pulling a prefix of the M1 PMU branch:
https://lore.kernel.org/linux-next/20250312201853.0d75d9fe@canb.auug.org.au/
Please pull.
- Oliver
The following changes since commit 80e54e84911a923c40d7bee33a34c1b4be148d7a:
Linux 6.14-rc6 (2025-03-09 13:45:25 -1000)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git/ tags/kvmarm-6.15
for you to fetch changes up to 369c0122682c4468a69f2454614eded71c5348f3:
Merge branch 'kvm-arm64/pmu-fixes' into kvmarm/next (2025-03-19 14:54:52 -0700)
----------------------------------------------------------------
KVM/arm64 updates for 6.15
- Nested virtualization support for VGICv3, giving the nested
hypervisor control of the VGIC hardware when running an L2 VM
- Removal of 'late' nested virtualization feature register masking,
making the supported feature set directly visible to userspace
- Support for emulating FEAT_PMUv3 on Apple silicon, taking advantage
of an IMPLEMENTATION DEFINED trap that covers all PMUv3 registers
- Paravirtual interface for discovering the set of CPU implementations
where a VM may run, addressing a longstanding issue of guest CPU
errata awareness in big-little systems and cross-implementation VM
migration
- Userspace control of the registers responsible for identifying a
particular CPU implementation (MIDR_EL1, REVIDR_EL1, AIDR_EL1),
allowing VMs to be migrated cross-implementation
- pKVM updates, including support for tracking stage-2 page table
allocations in the protected hypervisor in the 'SecPageTable' stat
- Fixes to vPMU, ensuring that userspace updates to the vPMU after
KVM_RUN are reflected into the backing perf events
----------------------------------------------------------------
Akihiko Odaki (5):
KVM: arm64: PMU: Set raw values from user to PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}
KVM: arm64: PMU: Assume PMU presence in pmu-emul.c
KVM: arm64: PMU: Fix SET_ONE_REG for vPMC regs
KVM: arm64: PMU: Reload when user modifies registers
KVM: arm64: PMU: Reload when resetting
Andre Przywara (1):
KVM: arm64: nv: Allow userland to set VGIC maintenance IRQ
Fuad Tabba (4):
KVM: arm64: Factor out setting HCRX_EL2 traps into separate function
KVM: arm64: Initialize HCRX_EL2 traps in pKVM
KVM: arm64: Factor out pKVM hyp vcpu creation to separate function
KVM: arm64: Create each pKVM hyp vcpu after its corresponding host vcpu
Jintack Lim (1):
KVM: arm64: nv: Respect virtual HCR_EL2.TWx setting
Marc Zyngier (25):
arm64: cpufeature: Handle NV_frac as a synonym of NV2
KVM: arm64: Hide ID_AA64MMFR2_EL1.NV from guest and userspace
KVM: arm64: Mark HCR.EL2.E2H RES0 when ID_AA64MMFR1_EL1.VH is zero
KVM: arm64: Mark HCR.EL2.{NV*,AT} RES0 when ID_AA64MMFR4_EL1.NV_frac is 0
KVM: arm64: Advertise NV2 in the boot messages
KVM: arm64: Consolidate idreg callbacks
KVM: arm64: Make ID_REG_LIMIT_FIELD_ENUM() more widely available
KVM: arm64: Enforce NV limits on a per-idregs basis
KVM: arm64: Move NV-specific capping to idreg sanitisation
KVM: arm64: Allow userspace to limit NV support to nVHE
KVM: arm64: Make ID_AA64MMFR4_EL1.NV_frac writable
KVM: arm64: Advertise FEAT_ECV when possible
arm64: sysreg: Add layout for ICH_HCR_EL2
arm64: sysreg: Add layout for ICH_VTR_EL2
arm64: sysreg: Add layout for ICH_MISR_EL2
KVM: arm64: nv: Load timer before the GIC
KVM: arm64: nv: Add ICH_*_EL2 registers to vpcu_sysreg
KVM: arm64: nv: Plumb handling of GICv3 EL2 accesses
KVM: arm64: nv: Sanitise ICH_HCR_EL2 accesses
KVM: arm64: nv: Nested GICv3 emulation
KVM: arm64: nv: Handle L2->L1 transition on interrupt injection
KVM: arm64: nv: Add Maintenance Interrupt emulation
KVM: arm64: nv: Propagate used_lrs between L1 and L0 contexts
KVM: arm64: nv: Fold GICv3 host trapping requirements into guest setup
KVM: arm64: nv: Fail KVM init if asking for NV without GICv3
Oliver Upton (32):
KVM: arm64: Set HCR_EL2.TID1 unconditionally
KVM: arm64: Load VPIDR_EL2 with the VM's MIDR_EL1 value
KVM: arm64: vgic-v4: Only attempt vLPI mapping for actual MSIs
KVM: arm64: vgic-v4: Only WARN for HW IRQ mismatch when unmapping vLPI
KVM: arm64: vgic-v4: Fall back to software irqbypass if LPI not found
KVM: arm64: Document ordering requirements for irqbypass
KVM: arm64: nv: Request vPE doorbell upon nested ERET to L2
KVM: arm64: Copy guest CTR_EL0 into hyp VM
KVM: arm64: Copy MIDR_EL1 into hyp VM when it is writable
KVM: arm64: Fix documentation for KVM_CAP_ARM_WRITABLE_IMP_ID_REGS
drivers/perf: apple_m1: Refactor event select/filter configuration
drivers/perf: apple_m1: Support host/guest event filtering
KVM: arm64: Compute PMCEID from arm_pmu's event bitmaps
KVM: arm64: Always support SW_INCR PMU event
KVM: arm64: Use a cpucap to determine if system supports FEAT_PMUv3
KVM: arm64: Drop kvm_arm_pmu_available static key
KVM: arm64: Use guard() to cleanup usage of arm_pmus_lock
KVM: arm64: Move PMUVer filtering into KVM code
KVM: arm64: Compute synthetic sysreg ESR for Apple PMUv3 traps
KVM: arm64: Advertise PMUv3 if IMPDEF traps are present
KVM: arm64: Remap PMUv3 events onto hardware
drivers/perf: apple_m1: Provide helper for mapping PMUv3 events
KVM: arm64: Provide 1 event counter on IMPDEF hardware
arm64: Enable IMP DEF PMUv3 traps on Apple M*
Merge branch 'kvm-arm64/misc' into kvmarm/next
Merge branch 'kvm-arm64/nv-vgic' into kvmarm/next
Merge branch 'kvm-arm64/nv-idregs' into kvmarm/next
Merge branch 'kvm-arm64/pv-cpuid' into kvmarm/next
Merge branch 'kvm-arm64/pmuv3-asahi' into kvmarm/next
Merge branch 'kvm-arm64/writable-midr' into kvmarm/next
Merge branch 'kvm-arm64/pkvm-6.15' into kvmarm/next
Merge branch 'kvm-arm64/pmu-fixes' into kvmarm/next
Sebastian Ott (5):
KVM: arm64: Maintain per-VM copy of implementation ID regs
KVM: arm64: Allow userspace to change the implementation ID registers
KVM: selftests: arm64: Test writes to MIDR,REVIDR,AIDR
KVM: arm64: Allow userspace to write ID_AA64MMFR0_EL1.TGRAN*_2
KVM: arm64: selftests: Test that TGRAN*_2 fields are writable
Shameer Kolothum (7):
arm64: Modify _midr_range() functions to read MIDR/REVIDR internally
KVM: arm64: Specify hypercall ABI for retrieving target implementations
KVM: arm64: Introduce KVM_REG_ARM_VENDOR_HYP_BMAP_2
arm64: Make _midr_in_range_list() an exported function
smccc/kvm_guest: Enable errata based on implementation CPUs
KVM: selftests: Add test for KVM_REG_ARM_VENDOR_HYP_BMAP_2
smccc: kvm_guest: Fix kernel builds for 32 bit arm
Vincent Donnefort (3):
KVM: arm64: Add flags to kvm_hyp_memcache
KVM: arm64: Distinct pKVM teardown memcache for stage-2
KVM: arm64: Count pKVM stage-2 usage in secondary pagetable stats
Will Deacon (1):
KVM: arm64: Tear down vGIC on failed vCPU creation
Documentation/virt/kvm/api.rst | 18 +
Documentation/virt/kvm/arm/fw-pseudo-registers.rst | 15 +-
Documentation/virt/kvm/arm/hypercalls.rst | 59 +++
Documentation/virt/kvm/devices/arm-vgic-its.rst | 5 +-
Documentation/virt/kvm/devices/arm-vgic-v3.rst | 12 +-
arch/arm64/include/asm/apple_m1_pmu.h | 1 +
arch/arm64/include/asm/cpucaps.h | 2 +
arch/arm64/include/asm/cpufeature.h | 28 +-
arch/arm64/include/asm/cputype.h | 40 +-
arch/arm64/include/asm/hypervisor.h | 1 +
arch/arm64/include/asm/kvm_arm.h | 4 +-
arch/arm64/include/asm/kvm_emulate.h | 37 ++
arch/arm64/include/asm/kvm_host.h | 65 ++-
arch/arm64/include/asm/kvm_hyp.h | 2 +
arch/arm64/include/asm/kvm_nested.h | 1 +
arch/arm64/include/asm/kvm_pkvm.h | 1 +
arch/arm64/include/asm/mmu.h | 3 +-
arch/arm64/include/asm/sysreg.h | 30 --
arch/arm64/include/uapi/asm/kvm.h | 14 +
arch/arm64/kernel/cpu_errata.c | 117 ++++-
arch/arm64/kernel/cpufeature.c | 53 ++-
arch/arm64/kernel/image-vars.h | 6 +-
arch/arm64/kernel/proton-pack.c | 17 +-
arch/arm64/kvm/Makefile | 2 +-
arch/arm64/kvm/arm.c | 76 +++-
arch/arm64/kvm/emulate-nested.c | 24 +-
arch/arm64/kvm/handle_exit.c | 6 +-
arch/arm64/kvm/hyp/include/hyp/switch.h | 4 +-
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 14 +-
arch/arm64/kvm/hyp/include/nvhe/mem_protect.h | 2 +-
arch/arm64/kvm/hyp/include/nvhe/pkvm.h | 6 -
arch/arm64/kvm/hyp/nvhe/mem_protect.c | 2 +-
arch/arm64/kvm/hyp/nvhe/pkvm.c | 79 ++--
arch/arm64/kvm/hyp/nvhe/sysreg-sr.c | 4 +-
arch/arm64/kvm/hyp/vgic-v3-sr.c | 16 +-
arch/arm64/kvm/hyp/vhe/switch.c | 22 +
arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 28 +-
arch/arm64/kvm/hypercalls.c | 13 +
arch/arm64/kvm/mmu.c | 22 +-
arch/arm64/kvm/nested.c | 298 +++++++------
arch/arm64/kvm/pkvm.c | 75 ++--
arch/arm64/kvm/pmu-emul.c | 194 +++++----
arch/arm64/kvm/pmu.c | 10 +-
arch/arm64/kvm/reset.c | 3 -
arch/arm64/kvm/sys_regs.c | 478 ++++++++++++++-------
arch/arm64/kvm/sys_regs.h | 10 +
arch/arm64/kvm/vgic-sys-reg-v3.c | 8 +-
arch/arm64/kvm/vgic/vgic-init.c | 29 ++
arch/arm64/kvm/vgic/vgic-kvm-device.c | 29 +-
arch/arm64/kvm/vgic/vgic-v3-nested.c | 409 ++++++++++++++++++
arch/arm64/kvm/vgic/vgic-v3.c | 46 +-
arch/arm64/kvm/vgic/vgic-v4.c | 35 +-
arch/arm64/kvm/vgic/vgic.c | 38 ++
arch/arm64/kvm/vgic/vgic.h | 6 +
arch/arm64/tools/cpucaps | 2 +
arch/arm64/tools/sysreg | 48 +++
drivers/clocksource/arm_arch_timer.c | 2 +-
drivers/firmware/smccc/kvm_guest.c | 66 +++
drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 +-
drivers/irqchip/irq-apple-aic.c | 8 +-
drivers/perf/apple_m1_cpu_pmu.c | 101 ++++-
include/kvm/arm_pmu.h | 17 +-
include/kvm/arm_vgic.h | 10 +
include/linux/arm-smccc.h | 15 +
include/linux/perf/arm_pmu.h | 4 +
include/uapi/linux/kvm.h | 1 +
tools/arch/arm/include/uapi/asm/kvm.h | 1 +
tools/arch/arm64/include/asm/sysreg.h | 30 --
tools/arch/arm64/include/uapi/asm/kvm.h | 12 +
tools/testing/selftests/kvm/arm64/get-reg-list.c | 1 +
tools/testing/selftests/kvm/arm64/hypercalls.c | 46 +-
tools/testing/selftests/kvm/arm64/set_id_regs.c | 40 +-
72 files changed, 2173 insertions(+), 752 deletions(-)
create mode 100644 arch/arm64/kvm/vgic/vgic-v3-nested.c
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [GIT PULL] KVM/arm64 updates for 6.15
2025-03-20 4:29 [GIT PULL] KVM/arm64 updates for 6.15 Oliver Upton
@ 2025-03-20 12:59 ` Marc Zyngier
2025-03-20 13:36 ` Oliver Upton
0 siblings, 1 reply; 5+ messages in thread
From: Marc Zyngier @ 2025-03-20 12:59 UTC (permalink / raw)
To: Paolo Bonzini, Oliver Upton
Cc: kvm, kvmarm, Akihiko Odaki, Will Deacon, Vincent Donnefort,
Sebastian Ott, Shameer Kolothum, Fuad Tabba
Paolo,
On Thu, 20 Mar 2025 04:29:25 +0000,
Oliver Upton <oliver.upton@linux.dev> wrote:
>
> Hi Paolo,
>
> Here's the latest pile o' patches for 6.15. The pull is based on a later
> -rc than I usually aim for to handle some conflicts with fixes that went
> in 6.14, but all of these patches have had exposure in -next for a good
> while.
>
> There was a small conflict with the arm perf tree, which was addressed
> by Will pulling a prefix of the M1 PMU branch:
>
> https://lore.kernel.org/linux-next/20250312201853.0d75d9fe@canb.auug.org.au/
When you merge this, please also apply the patch below to address a
mismerge issue caught by Stephen, which causes a build breakage.
Thanks, and sorry for the bother.
M.
From 6dbd388afc995de867081ea42d67b2630172bb2f Mon Sep 17 00:00:00 2001
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Thu, 20 Mar 2025 20:24:04 +1100
Subject: [PATCH] KVM: arm64: Fix mismerge of IMPDEF PMU support with PV CPUID
We missed one of the is_midr_in_range_list() occurences at
merge time, breaking the build.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250320203203.1de92b98@canb.auug.org.au
---
arch/arm64/kernel/cpu_errata.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index caac9e10a5bb7..b55f5f7057502 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -276,7 +276,7 @@ static bool has_impdef_pmuv3(const struct arm64_cpu_capabilities *entry, int sco
if (pmuver != ID_AA64DFR0_EL1_PMUVer_IMP_DEF)
return false;
- return is_midr_in_range_list(read_cpuid_id(), impdef_pmuv3_cpus);
+ return is_midr_in_range_list(impdef_pmuv3_cpus);
}
static void cpu_enable_impdef_pmuv3_traps(const struct arm64_cpu_capabilities *__unused)
--
2.39.2
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [GIT PULL] KVM/arm64 updates for 6.15
2025-03-20 12:59 ` Marc Zyngier
@ 2025-03-20 13:36 ` Oliver Upton
2025-03-20 17:23 ` Paolo Bonzini
0 siblings, 1 reply; 5+ messages in thread
From: Oliver Upton @ 2025-03-20 13:36 UTC (permalink / raw)
To: Marc Zyngier
Cc: Paolo Bonzini, kvm, kvmarm, Akihiko Odaki, Will Deacon,
Vincent Donnefort, Sebastian Ott, Shameer Kolothum, Fuad Tabba
Hey,
On Thu, Mar 20, 2025 at 12:59:40PM +0000, Marc Zyngier wrote:
> Paolo,
>
> On Thu, 20 Mar 2025 04:29:25 +0000,
> Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > Hi Paolo,
> >
> > Here's the latest pile o' patches for 6.15. The pull is based on a later
> > -rc than I usually aim for to handle some conflicts with fixes that went
> > in 6.14, but all of these patches have had exposure in -next for a good
> > while.
> >
> > There was a small conflict with the arm perf tree, which was addressed
> > by Will pulling a prefix of the M1 PMU branch:
> >
> > https://lore.kernel.org/linux-next/20250312201853.0d75d9fe@canb.auug.org.au/
>
> When you merge this, please also apply the patch below to address a
> mismerge issue caught by Stephen, which causes a build breakage.
The kvmarm-6.15 tag is fine, I caught this immediately when I was doing
testing for the pull request but forgot to push the fix to /next in
addition to the tag.
Fixing that right now.
Thanks,
Oliver
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [GIT PULL] KVM/arm64 updates for 6.15
2025-03-20 13:36 ` Oliver Upton
@ 2025-03-20 17:23 ` Paolo Bonzini
2025-03-20 17:38 ` Oliver Upton
0 siblings, 1 reply; 5+ messages in thread
From: Paolo Bonzini @ 2025-03-20 17:23 UTC (permalink / raw)
To: Oliver Upton
Cc: Marc Zyngier, kvm, kvmarm, Akihiko Odaki, Will Deacon,
Vincent Donnefort, Sebastian Ott, Shameer Kolothum, Fuad Tabba
On Thu, Mar 20, 2025 at 2:37 PM Oliver Upton <oliver.upton@linux.dev> wrote:
>
> Hey,
>
> On Thu, Mar 20, 2025 at 12:59:40PM +0000, Marc Zyngier wrote:
> > Paolo,
> >
> > On Thu, 20 Mar 2025 04:29:25 +0000,
> > Oliver Upton <oliver.upton@linux.dev> wrote:
> > >
> > > Hi Paolo,
> > >
> > > Here's the latest pile o' patches for 6.15. The pull is based on a later
> > > -rc than I usually aim for to handle some conflicts with fixes that went
> > > in 6.14, but all of these patches have had exposure in -next for a good
> > > while.
> > >
> > > There was a small conflict with the arm perf tree, which was addressed
> > > by Will pulling a prefix of the M1 PMU branch:
> > >
> > > https://lore.kernel.org/linux-next/20250312201853.0d75d9fe@canb.auug.org.au/
> >
> > When you merge this, please also apply the patch below to address a
> > mismerge issue caught by Stephen, which causes a build breakage.
>
> The kvmarm-6.15 tag is fine, I caught this immediately when I was doing
> testing for the pull request but forgot to push the fix to /next in
> addition to the tag.
Great, pulled now. Thanks!
Paolo
> Fixing that right now.
>
> Thanks,
> Oliver
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [GIT PULL] KVM/arm64 updates for 6.15
2025-03-20 17:23 ` Paolo Bonzini
@ 2025-03-20 17:38 ` Oliver Upton
0 siblings, 0 replies; 5+ messages in thread
From: Oliver Upton @ 2025-03-20 17:38 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Marc Zyngier, kvm, kvmarm, Akihiko Odaki, Will Deacon,
Vincent Donnefort, Sebastian Ott, Shameer Kolothum, Fuad Tabba
On Thu, Mar 20, 2025 at 06:23:22PM +0100, Paolo Bonzini wrote:
> On Thu, Mar 20, 2025 at 2:37 PM Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > Hey,
> >
> > On Thu, Mar 20, 2025 at 12:59:40PM +0000, Marc Zyngier wrote:
> > > Paolo,
> > >
> > > On Thu, 20 Mar 2025 04:29:25 +0000,
> > > Oliver Upton <oliver.upton@linux.dev> wrote:
> > > >
> > > > Hi Paolo,
> > > >
> > > > Here's the latest pile o' patches for 6.15. The pull is based on a later
> > > > -rc than I usually aim for to handle some conflicts with fixes that went
> > > > in 6.14, but all of these patches have had exposure in -next for a good
> > > > while.
> > > >
> > > > There was a small conflict with the arm perf tree, which was addressed
> > > > by Will pulling a prefix of the M1 PMU branch:
> > > >
> > > > https://lore.kernel.org/linux-next/20250312201853.0d75d9fe@canb.auug.org.au/
> > >
> > > When you merge this, please also apply the patch below to address a
> > > mismerge issue caught by Stephen, which causes a build breakage.
> >
> > The kvmarm-6.15 tag is fine, I caught this immediately when I was doing
> > testing for the pull request but forgot to push the fix to /next in
> > addition to the tag.
>
> Great, pulled now. Thanks!
Awesome, thank you and sorry for the noise.
Thanks,
Oliver
^ permalink raw reply [flat|nested] 5+ messages in thread
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2025-03-20 4:29 [GIT PULL] KVM/arm64 updates for 6.15 Oliver Upton
2025-03-20 12:59 ` Marc Zyngier
2025-03-20 13:36 ` Oliver Upton
2025-03-20 17:23 ` Paolo Bonzini
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