[kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[Like Xu]

We have adopted a test-driven development approach for vPMU's features,
and these two fixes below cover the paths for at least two corner use cases.

Like Xu (2):
  x86/pmu: Add Intel Guest Transactional (commited) cycles testcase
  x86/pmu: Wrap the written counter value with gp_counter_width

 x86/pmu.c | 47 ++++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 44 insertions(+), 3 deletions(-)

-- 
2.39.0

[kvm-unit-tests PATCH V2 1/2] x86/pmu: Add Intel Guest Transactional (commited) cycles testcase

[Like Xu]

From: Like Xu <likexu@tencent.com>

On Intel platforms with TSX feature, pmu users in guest can collect
the commited or total transactional cycles for a tsx-enabled workload,
adding new test cases to cover them, as they are not strictly the same
as normal hardware events from the KVM implementation point of view.

Signed-off-by: Like Xu <likexu@tencent.com>
---
V1: https://lore.kernel.org/kvm/20221207071506.15733-1-likexu@tencent.com/
V1 -> V2 Changelog:
- Drop HLE check; (Weijiang)
- Print out the data here for each GP counter; (Weijiang)
- Use "unsigned int" for EAX; (Sean)
- Use mnemonic for XBEGIN; (Sean)
- Drop use of _xend(); (Sean)
- Use xbegin inline instead of processor.h to avoid conflicts with vmx_tests;

 x86/pmu.c | 42 +++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 41 insertions(+), 1 deletion(-)

diff --git a/x86/pmu.c b/x86/pmu.c
index 72c2c9c..356d589 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -20,7 +20,7 @@
 
 typedef struct {
 	uint32_t ctr;
-	uint32_t config;
+	uint64_t config;
 	uint64_t count;
 	int idx;
 } pmu_counter_t;
@@ -547,6 +547,45 @@ static void check_emulated_instr(void)
 	report_prefix_pop();
 }
 
+#define XBEGIN_STARTED (~0u)
+static void check_tsx_cycles(void)
+{
+	pmu_counter_t cnt;
+	unsigned int i, ret = 0;
+
+	if (!this_cpu_has(X86_FEATURE_RTM))
+		return;
+
+	report_prefix_push("TSX cycles");
+
+	for (i = 0; i < pmu.nr_gp_counters; i++) {
+		cnt.ctr = MSR_GP_COUNTERx(i);
+
+		if (i == 2)
+			/* Transactional cycles commited only on gp counter 2 */
+			cnt.config = EVNTSEL_OS | EVNTSEL_USR | 0x30000003c;
+		else
+			/* Transactional cycles */
+			cnt.config = EVNTSEL_OS | EVNTSEL_USR | 0x10000003c;
+
+		start_event(&cnt);
+
+		asm volatile("xbegin 1f\n\t"
+				"1:\n\t"
+				: "+a" (ret) :: "memory");
+
+		/* Generate a non-canonical #GP to trigger ABORT. */
+		if (ret == XBEGIN_STARTED)
+			*(int *)NONCANONICAL = 0;
+
+		stop_event(&cnt);
+
+		report(cnt.count > 0, "gp cntr-%d with a value of %" PRId64 "", i, cnt.count);
+	}
+
+	report_prefix_pop();
+}
+
 static void check_counters(void)
 {
 	if (is_fep_available())
@@ -559,6 +598,7 @@ static void check_counters(void)
 	check_counter_overflow();
 	check_gp_counter_cmask();
 	check_running_counter_wrmsr();
+	check_tsx_cycles();
 }
 
 static void do_unsupported_width_counter_write(void *index)
-- 
2.39.0

[kvm-unit-tests PATCH RESEND 2/2] x86/pmu: Wrap the written counter value with gp_counter_width

[Like Xu]

From: Like Xu <likexu@tencent.com>

The check_emulated_instr() testcase fails when the KVM module parameter
"force_emulation_prefix" is 1. The root cause is that the value written by
the counter exceeds the maximum bit width of the GP counter.

Signed-off-by: Like Xu <likexu@tencent.com>
---
 x86/pmu.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/x86/pmu.c b/x86/pmu.c
index 356d589..4dbbe71 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -477,6 +477,7 @@ static void check_running_counter_wrmsr(void)
 static void check_emulated_instr(void)
 {
 	uint64_t status, instr_start, brnch_start;
+	uint64_t gp_counter_width = (1ull << pmu.gp_counter_width) - 1;
 	unsigned int branch_idx = pmu.is_intel ? 5 : 2;
 	pmu_counter_t brnch_cnt = {
 		.ctr = MSR_GP_COUNTERx(0),
@@ -498,8 +499,8 @@ static void check_emulated_instr(void)
 
 	brnch_start = -EXPECTED_BRNCH;
 	instr_start = -EXPECTED_INSTR;
-	wrmsr(MSR_GP_COUNTERx(0), brnch_start);
-	wrmsr(MSR_GP_COUNTERx(1), instr_start);
+	wrmsr(MSR_GP_COUNTERx(0), brnch_start & gp_counter_width);
+	wrmsr(MSR_GP_COUNTERx(1), instr_start & gp_counter_width);
 	// KVM_FEP is a magic prefix that forces emulation so
 	// 'KVM_FEP "jne label\n"' just counts as a single instruction.
 	asm volatile(
-- 
2.39.0

Re: [kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[Like Xu]

CC more KUT maintainers, could anyone pick up these two minor x86 tests ?

On 26/12/2022 3:54 pm, Like Xu wrote:
> We have adopted a test-driven development approach for vPMU's features,
> and these two fixes below cover the paths for at least two corner use cases.
> 
> Like Xu (2):
>    x86/pmu: Add Intel Guest Transactional (commited) cycles testcase
>    x86/pmu: Wrap the written counter value with gp_counter_width
> 
>   x86/pmu.c | 47 ++++++++++++++++++++++++++++++++++++++++++++---
>   1 file changed, 44 insertions(+), 3 deletions(-)
> 

Re: [kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[Thomas Huth]

On 14/02/2023 07.47, Like Xu wrote:
> CC more KUT maintainers, could anyone pick up these two minor x86 tests ?

Your patches never made it to my inbox - I guess they got stuck in a mail 
filter on the way ... Paolo, Sean, did you get them?

  Thomas


> On 26/12/2022 3:54 pm, Like Xu wrote:
>> We have adopted a test-driven development approach for vPMU's features,
>> and these two fixes below cover the paths for at least two corner use cases.
>>
>> Like Xu (2):
>>    x86/pmu: Add Intel Guest Transactional (commited) cycles testcase
>>    x86/pmu: Wrap the written counter value with gp_counter_width
>>
>>   x86/pmu.c | 47 ++++++++++++++++++++++++++++++++++++++++++++---
>>   1 file changed, 44 insertions(+), 3 deletions(-)
>>
> 

Re: [kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[Sean Christopherson]

On Thu, Mar 23, 2023, Thomas Huth wrote:
> On 14/02/2023 07.47, Like Xu wrote:
> > CC more KUT maintainers, could anyone pick up these two minor x86 tests ?
> 
> Your patches never made it to my inbox - I guess they got stuck in a mail
> filter on the way ... Paolo, Sean, did you get them?

Yeah, I have them.  I'll prep a pull request, there are many KUT x86 patches
floating around that need to get merged.  Will likely take me a few days though.

Re: [kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[Sean Christopherson]

On Thu, Mar 23, 2023, Sean Christopherson wrote:
> On Thu, Mar 23, 2023, Thomas Huth wrote:
> > On 14/02/2023 07.47, Like Xu wrote:
> > > CC more KUT maintainers, could anyone pick up these two minor x86 tests ?
> > 
> > Your patches never made it to my inbox - I guess they got stuck in a mail
> > filter on the way ... Paolo, Sean, did you get them?
> 
> Yeah, I have them.  I'll prep a pull request, there are many KUT x86 patches
> floating around that need to get merged.  Will likely take me a few days though.

Gah, forgot about this series.  I'll plan on doing another pull request next week,
there are more outstanding KUT patches besides this one.  And I'm finally diving
into KVM PMU stuff tomorrow, too.

Re: [kvm-unit-tests PATCH 0/2] x86/pmu: Add TSX testcase and fix force_emulation_prefix

[Sean Christopherson]

On Mon, 26 Dec 2022 15:54:10 +0800, Like Xu wrote:
> We have adopted a test-driven development approach for vPMU's features,
> and these two fixes below cover the paths for at least two corner use cases.
> 
> Like Xu (2):
>   x86/pmu: Add Intel Guest Transactional (commited) cycles testcase
>   x86/pmu: Wrap the written counter value with gp_counter_width
> 
> [...]

Applied to kvm-x86 next, thanks!

[1/2] x86/pmu: Add Intel Guest Transactional (commited) cycles testcase
      https://github.com/kvm-x86/kvm-unit-tests/commit/ece17cfebc27
[2/2] x86/pmu: Wrap the written counter value with gp_counter_width
      https://github.com/kvm-x86/linux/commit/15507bb0

--
https://github.com/kvm-x86/kvm-unit-tests/tree/next