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From: Chao Gao <chao.gao@intel.com>
To: Binbin Wu <binbin.wu@linux.intel.com>
Cc: <kvm@vger.kernel.org>, <seanjc@google.com>, <pbonzini@redhat.com>,
	<robert.hu@linux.intel.com>
Subject: Re: [kvm-unit-tests v3 1/4] x86: Allow setting of CR3 LAM bits if LAM supported
Date: Fri, 21 Apr 2023 10:02:32 +0800	[thread overview]
Message-ID: <ZEHuuAw39ZXopaqN@chao-email> (raw)
In-Reply-To: <20230412075134.21240-2-binbin.wu@linux.intel.com>

On Wed, Apr 12, 2023 at 03:51:31PM +0800, Binbin Wu wrote:
>If LAM is supported, VM entry allows CR3.LAM_U48 (bit 62) and CR3.LAM_U57
>(bit 61) to be set in CR3 field.
>
>Change the test result expectations when setting CR3.LAM_U48 or CR3.LAM_U57
>on vmlaunch tests when LAM is supported.
>
>Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com>
>Reviewed-by: Chao Gao <chao.gao@intel.com>
>---
> lib/x86/processor.h | 3 +++
> x86/vmx_tests.c     | 6 +++++-
> 2 files changed, 8 insertions(+), 1 deletion(-)
>
>diff --git a/lib/x86/processor.h b/lib/x86/processor.h
>index 3d58ef7..e00a32b 100644
>--- a/lib/x86/processor.h
>+++ b/lib/x86/processor.h
>@@ -55,6 +55,8 @@
> #define X86_CR0_PG		BIT(X86_CR0_PG_BIT)
> 
> #define X86_CR3_PCID_MASK	GENMASK(11, 0)
>+#define X86_CR3_LAM_U57_BIT	(61)
>+#define X86_CR3_LAM_U48_BIT	(62)
> 
> #define X86_CR4_VME_BIT		(0)
> #define X86_CR4_VME		BIT(X86_CR4_VME_BIT)
>@@ -248,6 +250,7 @@ static inline bool is_intel(void)
> #define	X86_FEATURE_SPEC_CTRL		(CPUID(0x7, 0, EDX, 26))
> #define	X86_FEATURE_ARCH_CAPABILITIES	(CPUID(0x7, 0, EDX, 29))
> #define	X86_FEATURE_PKS			(CPUID(0x7, 0, ECX, 31))
>+#define	X86_FEATURE_LAM			(CPUID(0x7, 1, EAX, 26))
> 
> /*
>  * Extended Leafs, a.k.a. AMD defined
>diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
>index 7bba816..5ee1264 100644
>--- a/x86/vmx_tests.c
>+++ b/x86/vmx_tests.c
>@@ -7000,7 +7000,11 @@ static void test_host_ctl_regs(void)
> 		cr3 = cr3_saved | (1ul << i);
> 		vmcs_write(HOST_CR3, cr3);
> 		report_prefix_pushf("HOST_CR3 %lx", cr3);
>-		test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
>+		if (this_cpu_has(X86_FEATURE_LAM) &&
>+		    ((i == X86_CR3_LAM_U57_BIT) || ( i == X86_CR3_LAM_U48_BIT)))

						    ^ stray space

>+			test_vmx_vmlaunch(0);
>+		else
>+			test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
> 		report_prefix_pop();
> 	}
> 
>-- 
>2.25.1
>

  reply	other threads:[~2023-04-21  2:02 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-12  7:51 [kvm-unit-tests v3 0/4] x86: Add test cases for LAM Binbin Wu
2023-04-12  7:51 ` [kvm-unit-tests v3 1/4] x86: Allow setting of CR3 LAM bits if LAM supported Binbin Wu
2023-04-21  2:02   ` Chao Gao [this message]
2023-04-23  1:42     ` Binbin Wu
2023-04-12  7:51 ` [kvm-unit-tests v3 2/4] x86: Add test case for LAM_SUP Binbin Wu
2023-04-21  3:32   ` Chao Gao
2023-04-12  7:51 ` [kvm-unit-tests v3 3/4] x86: Add test cases for LAM_{U48,U57} Binbin Wu
2023-04-21  5:06   ` Chao Gao
2023-04-23  3:07     ` Binbin Wu
2023-04-12  7:51 ` [kvm-unit-tests v3 4/4] x86: Add test case for INVVPID with LAM Binbin Wu
2023-04-21  5:38   ` Chao Gao
2023-04-23  3:41     ` Binbin Wu
2023-04-23  6:13       ` Binbin Wu

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