RE: [PATCH v2 02/11] iommu: Add nested domain support

Tian, Kevin
2023-05-19T08:51:33Z

> From: Yi Liu <yi.l.liu@intel.com>
> Sent: Thursday, May 11, 2023 10:39 PM
>
> @@ -66,6 +66,9 @@ struct iommu_domain_geometry {
>
> #define __IOMMU_DOMAIN_SVA (1U << 4) /* Shared process address
> space */
>
> +#define __IOMMU_DOMAIN_NESTED (1U << 5) /* User-managed IOVA
> nested on
> + a stage-2 translation */

s/IOVA/address space/

> @@ -346,6 +350,10 @@ struct iommu_ops {
> * @iotlb_sync_map: Sync mappings created recently using @map to the
> hardware
> * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty
> flush
> * queue
> + * @cache_invalidate_user: Flush hardware TLBs caching user space IO
> mappings
> + * @cache_invalidate_user_data_len: Defined length of input user data for
> the
> + * cache_invalidate_user op, being sizeof the
> + * structure in include/uapi/linux/iommufd.h

same as comment to last patch, can this be merged with @hw_info?