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Thu, 13 Jul 2023 07:51:31 -0700 (PDT) Date: Thu, 13 Jul 2023 07:51:30 -0700 In-Reply-To: Mime-Version: 1.0 References: <41b7e5503a3e6057dc168b3c5a9693651c501d22.1689151537.git.kai.huang@intel.com> <20230712221510.GG3894444@ls.amr.corp.intel.com> <4202b26acdb3fe926dd1a9a46c2c7c35a5d85529.camel@intel.com> <20230713074204.GA3139243@hirez.programming.kicks-ass.net> Message-ID: Subject: Re: [PATCH 09/10] x86/virt/tdx: Wire up basic SEAMCALL functions From: Sean Christopherson To: Kai Huang Cc: "peterz@infradead.org" , "kvm@vger.kernel.org" , Dave Hansen , "bp@alien8.de" , "x86@kernel.org" , "hpa@zytor.com" , "mingo@redhat.com" , "kirill.shutemov@linux.intel.com" , "tglx@linutronix.de" , "isaku.yamahata@gmail.com" , "pbonzini@redhat.com" , Isaku Yamahata , "linux-kernel@vger.kernel.org" , "sathyanarayanan.kuppuswamy@linux.intel.com" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, Jul 13, 2023, Kai Huang wrote: > On Thu, 2023-07-13 at 09:42 +0200, Peter Zijlstra wrote: > > On Thu, Jul 13, 2023 at 03:46:52AM +0000, Huang, Kai wrote: > > > On Wed, 2023-07-12 at 15:15 -0700, Isaku Yamahata wrote: > > > > > The SEAMCALL ABI is very similar to the TDCALL ABI and leverages = much > > > > > TDCALL infrastructure.=EF=BF=BD Wire up basic functions to make S= EAMCALLs for > > > > > the basic TDX support: __seamcall(), __seamcall_ret() and > > > > > __seamcall_saved_ret() which is for TDH.VP.ENTER leaf function. > > > >=20 > > > > Hi.=EF=BF=BD __seamcall_saved_ret() uses struct tdx_module_arg as i= nput and output.=EF=BF=BD For > > > > KVM TDH.VP.ENTER case, those arguments are already in unsigned long > > > > kvm_vcpu_arch::regs[].=EF=BF=BD It's silly to move those values twi= ce.=EF=BF=BD From > > > > kvm_vcpu_arch::regs to tdx_module_args.=EF=BF=BD From tdx_module_ar= gs to real registers. > > > >=20 > > > > If TDH.VP.ENTER is the only user of __seamcall_saved_ret(), can we = make it to > > > > take unsigned long kvm_vcpu_argh::regs[NR_VCPU_REGS]?=EF=BF=BD Mayb= e I can make the > > > > change with TDX KVM patch series. > > >=20 > > > The assembly code assumes the second argument is a pointer to 'struct > > > tdx_module_args'. I don't know how can we change __seamcall_saved_re= t() to > > > achieve what you said. We might change the kvm_vcpu_argh::regs[NR_VC= PU_REGS] to > > > match 'struct tdx_module_args''s layout and manually convert part of = "regs" to > > > the structure and pass to __seamcall_saved_ret(), but it's too hacky = I suppose. > >=20 > > I suspect the kvm_vcpu_arch::regs layout is given by hardware; so the > > only option would be to make tdx_module_args match that. It's a slightl= y > > unfortunate layout, but meh. > >=20 > > Then you can simply do: > >=20 > > __seamcall_saved_ret(leaf, (struct tdx_module_args *)vcpu->arch->regs)= ; > >=20 > >=20 >=20 > I don't think the layout matches hardware, especially I think there's no > "hardware layout" for GPRs that are concerned here. They are just for KV= M > itself to save guest's registers when the guest exits to KVM, so that KVM= can > restore them when returning back to the guest. kvm_vcpu_arch::regs does follow the hardware-defined indices, and that's re= quired for myriad emulation flows, e.g. saving GPRs into SMRAM, anywhere KVM gets = a GPR index from an instruction opcode or vmcs.VMX_INSTRUCTION_INFO, etc.