From: Chao Gao <chao.gao@intel.com>
To: "Yang, Weijiang" <weijiang.yang@intel.com>
Cc: <seanjc@google.com>, <pbonzini@redhat.com>,
<peterz@infradead.org>, <john.allen@amd.com>,
<kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<rick.p.edgecombe@intel.com>, <binbin.wu@linux.intel.com>
Subject: Re: [PATCH v4 09/20] KVM:x86: Add common code of CET MSR access
Date: Thu, 27 Jul 2023 15:41:08 +0800 [thread overview]
Message-ID: <ZMIflGq2i3m3bNLU@chao-email> (raw)
In-Reply-To: <4565ab4b-f386-7b70-4634-627e92acbb45@intel.com>
>> - case MSR_KVM_GUEST_SSP:
>> - case MSR_IA32_PL0_SSP ... MSR_IA32_INT_SSP_TAB:
>> case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
>> if (!kvm_cet_is_msr_accessible(vcpu, msr_info))
>> return 1;
>> if (is_noncanonical_address(data, vcpu))
>> return 1;
>> if (!IS_ALIGNED(data, 4))
>> return 1;
>> if (msr == MSR_IA32_PL0_SSP || msr == MSR_IA32_PL1_SSP ||
>> msr == MSR_IA32_PL2_SSP) {
>> vcpu->arch.cet_s_ssp[msr - MSR_IA32_PL0_SSP] = data;
>> } else if (msr == MSR_IA32_PL3_SSP) {
>> kvm_set_xsave_msr(msr_info);
>> }
>> break;
>>
>>
>>
>> BTW, shouldn't bit2:0 of MSR_KVM_GUEST_SSP be 0? i.e., for MSR_KVM_GUEST_SSP,
>> the alignment check should be IS_ALIGNED(data, 8).
>
>The check for GUEST_SSP should be consistent with that of PLx_SSPs, otherwise
>there would be issues
OK. I had the question because Gil said in a previous email:
IDT event delivery, when changing to rings 0-2 will load SSP from the
MSR corresponding to the new ring. These transitions check that bits
2:0 of the new value are all zero and will generate a nested fault if
any of those bits are set. (Far CALL using a call gate also checks this
if changing CPL.)
it sounds to me, at least for CPL0-2, SSP (or the synethic
MSR_KVM_GUEST_SSP) should be 8-byte aligned. Otherwise, there will be a
nested fault when trying to load SSP.
I might be overly cautious. No objection to do IS_ALIGNED(data, 4) for SSP.
next prev parent reply other threads:[~2023-07-27 8:14 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-21 3:03 [PATCH v4 00/20] Enable CET Virtualization Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 01/20] x86/cpufeatures: Add CPU feature flags for shadow stacks Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 02/20] x86/fpu/xstate: Introduce CET MSR and XSAVES supervisor states Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 03/20] KVM:x86: Report XSS as to-be-saved if there are supported features Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 04/20] KVM:x86: Refresh CPUID on write to guest MSR_IA32_XSS Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 05/20] KVM:x86: Initialize kvm_caps.supported_xss Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 06/20] KVM:x86: Load guest FPU state when access XSAVE-managed MSRs Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 07/20] KVM:x86: Add fault checks for guest CR4.CET setting Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 08/20] KVM:x86: Report KVM supported CET MSRs as to-be-saved Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 09/20] KVM:x86: Add common code of CET MSR access Yang Weijiang
2023-07-26 7:33 ` Chao Gao
2023-07-26 8:26 ` Yang, Weijiang
2023-07-26 13:46 ` Chao Gao
2023-07-27 6:06 ` Yang, Weijiang
2023-07-27 7:41 ` Chao Gao [this message]
2023-07-27 16:58 ` Sean Christopherson
2023-07-21 3:03 ` [PATCH v4 10/20] KVM:x86: Make guest supervisor states as non-XSAVE managed Yang Weijiang
2023-07-24 8:26 ` Chao Gao
2023-07-24 13:50 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 11/20] KVM:x86: Save and reload GUEST_SSP to/from SMRAM Yang Weijiang
2023-07-24 9:13 ` Chao Gao
2023-07-24 14:16 ` Yang, Weijiang
2023-07-24 14:26 ` Sean Christopherson
2023-07-21 3:03 ` [PATCH v4 12/20] KVM:VMX: Introduce CET VMCS fields and control bits Yang Weijiang
2023-07-27 5:26 ` Chao Gao
2023-07-27 7:13 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 13/20] KVM:VMX: Emulate read and write to CET MSRs Yang Weijiang
2023-07-26 8:06 ` Chao Gao
2023-07-27 3:19 ` Yang, Weijiang
2023-07-27 5:16 ` Chao Gao
2023-07-27 7:10 ` Yang, Weijiang
2023-07-27 15:20 ` Sean Christopherson
2023-07-28 0:43 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 14/20] KVM:VMX: Set up interception for " Yang Weijiang
2023-07-26 8:30 ` Chao Gao
2023-07-27 3:48 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 15/20] KVM:VMX: Save host MSR_IA32_S_CET to VMCS field Yang Weijiang
2023-07-26 8:47 ` Chao Gao
2023-07-26 14:05 ` Sean Christopherson
2023-07-27 7:29 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 16/20] KVM:x86: Optimize CET supervisor SSP save/reload Yang Weijiang
2023-07-27 3:27 ` Chao Gao
2023-07-27 6:23 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 17/20] KVM:x86: Enable CET virtualization for VMX and advertise to userspace Yang Weijiang
2023-07-27 6:32 ` Chao Gao
2023-07-27 7:26 ` Yang, Weijiang
2023-07-21 3:03 ` [PATCH v4 18/20] KVM:x86: Enable guest CET supervisor xstate bit support Yang Weijiang
2023-07-27 8:03 ` Chao Gao
2023-07-21 3:03 ` [PATCH v4 19/20] KVM:nVMX: Refine error code injection to nested VM Yang Weijiang
2023-07-21 3:03 ` [PATCH v4 20/20] KVM:nVMX: Enable CET support for " Yang Weijiang
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