From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D52CC04A6A for ; Wed, 2 Aug 2023 17:05:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231809AbjHBRFP (ORCPT ); Wed, 2 Aug 2023 13:05:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231526AbjHBRFJ (ORCPT ); Wed, 2 Aug 2023 13:05:09 -0400 Received: from out-84.mta0.migadu.com (out-84.mta0.migadu.com [91.218.175.84]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58D362D6A for ; Wed, 2 Aug 2023 10:04:52 -0700 (PDT) Date: Wed, 2 Aug 2023 17:04:33 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1690995878; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=WJgiPi3z5fgU4lTzUcaeihvoVV4/arRmDPqFGrxctos=; b=fkFkihM77h5zK99tash/Nlp41RcOozNnYYf++vLojGZDRyhHUYuWTDI7P5D79nJdokZhbq ZKcshmP9FPi6MpXqE6SJ4MyX+U8ZZawvQbvkh3bH5uacL3SUvpPWaMJTsSlHQy9Le9cSxl fYGgLtGp6N2nBXN+lITPi+y6pHfmvyA= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Jing Zhang Cc: KVM , KVMARM , ARMLinux , Marc Zyngier , Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Raghavendra Rao Ananta , Suraj Jitindar Singh , Cornelia Huck Subject: Re: [PATCH v7 01/10] KVM: arm64: Allow userspace to get the writable masks for feature ID registers Message-ID: References: <20230801152007.337272-1-jingzhangos@google.com> <20230801152007.337272-2-jingzhangos@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Aug 02, 2023 at 08:55:43AM -0700, Jing Zhang wrote: > > > +#define ARM64_FEATURE_ID_SPACE_SIZE (3 * 8 * 8) > > > + > > > +struct feature_id_writable_masks { > > > + __u64 mask[ARM64_FEATURE_ID_SPACE_SIZE]; > > > +}; > > > > This UAPI is rather difficult to extend in the future. We may need to > > support describing the masks of multiple ranges of registers in the > > future. I was thinking something along the lines of: > > > > enum reg_mask_range_idx { > > FEATURE_ID, > > }; > > > > struct reg_mask_range { > > __u64 idx; > > __u64 *masks; > > __u64 rsvd[6]; > > }; > > > Since have the way to map sysregs encoding to the index in the mask > array, we can extend the UAPI by just adding a size field in struct > feature_id_writable_masks like below: > struct feature_id_writable_masks { > __u64 size; > __u64 mask[ARM64_FEATURE_ID_SPACE_SIZE]; > }; > The 'size' field can be used as input for the size of 'mask' array and > output for the number of masks actually read in. > This way, we can freely add more ranges without breaking anything in userspace. > WDYT? Sorry, 'index' is a bit overloaded in this context. The point I was trying to get across is that we might want to describe a completely different range of registers than the feature ID registers in the future. Nonetheless, we shouldn't even presume the shape of future extensions to the ioctl. struct reg_mask_range { __u64 addr; /* pointer to mask array */ __u64 rsvd[7]; }; Then in KVM we should require ::rsvd be zero and fail the ioctl otherwise. -- Thanks, Oliver