From: Sean Christopherson <seanjc@google.com>
To: Jim Mattson <jmattson@google.com>
Cc: kvm@vger.kernel.org, "'Paolo Bonzini '" <pbonzini@redhat.com>
Subject: Re: [PATCH v4 3/3] KVM: selftests: Test behavior of HWCR
Date: Thu, 5 Oct 2023 20:44:26 -0700 [thread overview]
Message-ID: <ZR-CmoacxFxkqZ6Z@google.com> (raw)
In-Reply-To: <20230929230246.1954854-4-jmattson@google.com>
On Fri, Sep 29, 2023, Jim Mattson wrote:
> diff --git a/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c b/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
> new file mode 100644
> index 000000000000..1a6a09791ac3
> --- /dev/null
> +++ b/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
> @@ -0,0 +1,52 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023, Google LLC.
> + *
> + * Tests for the K7_HWCR MSR.
My vote is to drop this. I have a hard time believing anyone ever gets value
out of these, and they have a bad habit of becoming stale.
> + */
> +
> +#define _GNU_SOURCE /* for program_invocation_short_name */
> +#include <sys/ioctl.h>
> +
> +#include "test_util.h"
> +#include "kvm_util.h"
> +#include "vmx.h"
> +
> +void test_hwcr_bit(struct kvm_vcpu *vcpu, unsigned int bit)
> +{
> + const unsigned long long ignored = BIT_ULL(3) | BIT_ULL(6) | BIT_ULL(8);
uint64_t instead of "unsigned long long"
> + const unsigned long long valid = BIT_ULL(18) | BIT_ULL(24);
> + const unsigned long long legal = ignored | valid;
> + uint64_t val = BIT_ULL(bit);
> + uint64_t check;
> + int r;
> +
> + r = _vcpu_set_msr(vcpu, MSR_K7_HWCR, val);
> + TEST_ASSERT((r == 1 && (val & legal)) || (r == 0 && !(val & legal)),
Hrm. The "val & legal" is weird. It works, but only because "val" is guaranteed
to be a single bit. I much prefer to check for illegal bits, not if there is at
least one legal bit. It's kinda ugly, but IMO using a ternary operator is more
intuitive than checking the same thing twice.
> + "Unexpected result (%d) when setting HWCR[bit %u]", r, bit);
And rather than just say "Unexpected result", explicitly say "fail" or "succeed",
I always forget that KVM_SET_MSRS has odd return codes.
r = _vcpu_set_msr(vcpu, MSR_K7_HWCR, val);
TEST_ASSERT(val & ~legal ? !r : r == 1,
"Expected KVM_SET_MSRS(MSR_K7_HWCR) = 0x%lx to %s",
val, val & ~legal ? "succeed" : "fail");
> + check = vcpu_get_msr(vcpu, MSR_K7_HWCR);
s/check/actual?
> + if (val & valid) {
> + TEST_ASSERT(check == val,
There's no reason to force this code to work with single bits. I don't mind
applying the test with single bit testing, but making it play nice with more
complex values is trivial, and IMO much easier on the eyes.
TEST_ASSERT(actual == (val & valid),
"Bit %u: unexpected HWCR 0x%lx; expected 0x%lx",
bit, actual, (val & valid));
> + "Bit %u: unexpected HWCR %lx; expected %lx", bit,
0x for the value to avoid decimal vs. hex confusion.
> + check, val);
> + vcpu_set_msr(vcpu, MSR_K7_HWCR, 0);
> + } else {
> + TEST_ASSERT(!check,
> + "Bit %u: unexpected HWCR %lx; expected 0", bit,
> + check);
> + }
> +}
If you've no objections, I'll apply the changes as below:
---
tools/testing/selftests/kvm/Makefile | 1 +
.../selftests/kvm/x86_64/hwcr_msr_test.c | 47 +++++++++++++++++++
2 files changed, 48 insertions(+)
create mode 100644 tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
index a3bb36fb3cfc..3b82c583c68d 100644
--- a/tools/testing/selftests/kvm/Makefile
+++ b/tools/testing/selftests/kvm/Makefile
@@ -119,6 +119,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/amx_test
TEST_GEN_PROGS_x86_64 += x86_64/max_vcpuid_cap_test
TEST_GEN_PROGS_x86_64 += x86_64/triple_fault_event_test
TEST_GEN_PROGS_x86_64 += x86_64/recalc_apic_map_test
+TEST_GEN_PROGS_x86_64 += x86_64/hwcr_msr_test
TEST_GEN_PROGS_x86_64 += access_tracking_perf_test
TEST_GEN_PROGS_x86_64 += demand_paging_test
TEST_GEN_PROGS_x86_64 += dirty_log_test
diff --git a/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c b/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
new file mode 100644
index 000000000000..df351ae17029
--- /dev/null
+++ b/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023, Google LLC.
+ */
+
+#define _GNU_SOURCE /* for program_invocation_short_name */
+#include <sys/ioctl.h>
+
+#include "test_util.h"
+#include "kvm_util.h"
+#include "vmx.h"
+
+void test_hwcr_bit(struct kvm_vcpu *vcpu, unsigned int bit)
+{
+ const uint64_t ignored = BIT_ULL(3) | BIT_ULL(6) | BIT_ULL(8);
+ const uint64_t valid = BIT_ULL(18) | BIT_ULL(24);
+ const uint64_t legal = ignored | valid;
+ uint64_t val = BIT_ULL(bit);
+ uint64_t actual;
+ int r;
+
+ r = _vcpu_set_msr(vcpu, MSR_K7_HWCR, val);
+ TEST_ASSERT(val & ~legal ? !r : r == 1,
+ "Expected KVM_SET_MSRS(MSR_K7_HWCR) = 0x%lx to %s",
+ val, val & ~legal ? "fail" : "succeed");
+
+ actual = vcpu_get_msr(vcpu, MSR_K7_HWCR);
+ TEST_ASSERT(actual == (val & valid),
+ "Bit %u: unexpected HWCR 0x%lx; expected 0x%lx",
+ bit, actual, (val & valid));
+
+ vcpu_set_msr(vcpu, MSR_K7_HWCR, 0);
+}
+
+int main(int argc, char *argv[])
+{
+ struct kvm_vm *vm;
+ struct kvm_vcpu *vcpu;
+ unsigned int bit;
+
+ vm = vm_create_with_one_vcpu(&vcpu, NULL);
+
+ for (bit = 0; bit < BITS_PER_LONG; bit++)
+ test_hwcr_bit(vcpu, bit);
+
+ kvm_vm_free(vm);
+}
base-commit: 9a90e7aad79e519f7e4afd9d98778192c3b44b6e
--
next prev parent reply other threads:[~2023-10-06 3:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-29 23:02 [PATCH v4 0/3] KVM: x86: Update HWCR virtualization Jim Mattson
2023-09-29 23:02 ` [PATCH v4 1/3] KVM: x86: Allow HWCR.McStatusWrEn to be cleared once set Jim Mattson
2023-09-29 23:02 ` [PATCH v4 2/3] KVM: x86: Virtualize HWCR.TscFreqSel[bit 24] Jim Mattson
2023-09-29 23:02 ` [PATCH v4 3/3] KVM: selftests: Test behavior of HWCR Jim Mattson
2023-10-06 3:44 ` Sean Christopherson [this message]
2023-10-06 3:59 ` Jim Mattson
2023-10-09 20:05 ` [PATCH v4 0/3] KVM: x86: Update HWCR virtualization Sean Christopherson
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