From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3CC7CDB47E for ; Sat, 14 Oct 2023 03:32:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232717AbjJNDc6 (ORCPT ); Fri, 13 Oct 2023 23:32:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229830AbjJNDc4 (ORCPT ); Fri, 13 Oct 2023 23:32:56 -0400 Received: from out-205.mta0.migadu.com (out-205.mta0.migadu.com [IPv6:2001:41d0:1004:224b::cd]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2AEEBE for ; Fri, 13 Oct 2023 20:32:53 -0700 (PDT) Date: Sat, 14 Oct 2023 03:32:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1697254370; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=oLvsxWswXaahyZapR9wNq3U+gs4SHEITbqa7yyhDkjg=; b=nkKrkV80GsiNRpb4OJXVy3FEoYr7FRCEh56ngj/t0VOHWIlBUNyjf+KC+oh/GDazxnItRs aLy0Q3D1vzQUsBe6IINymydIqWsBHLKFCXIz1hsZMfwdrzp6+AgjixR2MkZ5XCmL/2AwJt BpzgY+zRDfVlxKdVnghut/3kEuyoljk= X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Oliver Upton To: Marc Zyngier Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs Message-ID: References: <20231013223311.3950585-1-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231013223311.3950585-1-maz@kernel.org> X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Oct 13, 2023 at 11:33:11PM +0100, Marc Zyngier wrote: > DBGVCR32_EL2, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2 are required to > UNDEF when AArch32 isn't implemented, which is definitely the case when > running NV. > > Given that this is the only case where these registers can trap, > unconditionally inject an UNDEF exception. > > Signed-off-by: Marc Zyngier If you intend to send this as a fix for 6.6: Reviewed-by: Oliver Upton Otherwise it is on the stack of patches I'll pick up for 6.7 -- Thanks, Oliver