From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 222A063AA for ; Mon, 15 Jan 2024 07:07:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iwIhfe0b" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705302464; x=1736838464; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=o7qZxhaRG6s2AdoDhlfCwW2RkcbUaQCrovplsa+bUjw=; b=iwIhfe0bOflrE/u7zZuUeZU3JAeMAjlvZe9tR1SMJ0MSBKqzolT3aLbV WHErzBU4R8+7+9Z1jQ/nDhvWGoaLrunzoe+qI2lFFJ/TMnWBin5bG1Ra/ /5owGe6Trcych3BgJxCRFGAgtT6RveTk1A73+7iRZtOTC34Ef53pcx9A4 T8g0KNhs/H/E38v85KyvQvbRTfljDko1QEZjpDUho3wdXcSYFVbfu5gMi /mTkLjJtYlG3QqPEJwT5/EMZdKSkDcRmpAOQZsAPmy3QhtL43UarsO3/1 hDmxwyjIgnSS9n8Pc3/BUV1Um3tQ8Rkf5qoLUWDhtruEjdxkSS3NCfueM Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10953"; a="6918406" X-IronPort-AV: E=Sophos;i="6.04,196,1695711600"; d="scan'208";a="6918406" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jan 2024 23:07:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10953"; a="1114855357" X-IronPort-AV: E=Sophos;i="6.04,196,1695711600"; d="scan'208";a="1114855357" Received: from liuzhao-optiplex-7080.sh.intel.com (HELO localhost) ([10.239.160.36]) by fmsmga005.fm.intel.com with ESMTP; 14 Jan 2024 23:07:39 -0800 Date: Mon, 15 Jan 2024 15:20:37 +0800 From: Zhao Liu To: Yuan Yao Cc: Xiaoyao Li , Eduardo Habkost , Marcel Apfelbaum , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Marcelo Tosatti , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Zhuocheng Ding , Zhao Liu , Babu Moger , Yongwei Ma Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F] Message-ID: References: <20240108082727.420817-1-zhao1.liu@linux.intel.com> <20240108082727.420817-9-zhao1.liu@linux.intel.com> <20240115032524.44q5ygb25ieut44c@yy-desk-7060> <336a4816-966d-42b0-b34b-47be3e41446d@intel.com> <20240115052022.xbv6exhm4af7kai7@yy-desk-7060> <20240115065730.ezwpd3sjoycc57rm@yy-desk-7060> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240115065730.ezwpd3sjoycc57rm@yy-desk-7060> On Mon, Jan 15, 2024 at 02:57:30PM +0800, Yuan Yao wrote: > Date: Mon, 15 Jan 2024 14:57:30 +0800 > From: Yuan Yao > Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F] > > On Mon, Jan 15, 2024 at 02:20:20PM +0800, Zhao Liu wrote: > > On Mon, Jan 15, 2024 at 01:20:22PM +0800, Yuan Yao wrote: > > > Date: Mon, 15 Jan 2024 13:20:22 +0800 > > > From: Yuan Yao > > > Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F] > > > > > > Ah, so my understanding is incorrect on this. > > > > > > I tried on one raptor lake i5-i335U, which also hybrid soc but doesn't have > > > module level, in this case 0x1f and 0xb have same values in core/lp level. > > > > Some socs have modules/dies but they don't expose them in 0x1f. > > Here they don't expose because from hardware level they can't or possible > software level configuration (i.e. disable some cores in bios) ? > This leaf is decided at hardware level. Whether or not which levels are exposed sometimes depends if there is the topology-related feature, but there is no clear rule (just as in the ADL family neither ADL-S/P exposes modules, while ADL-N exposes modules). Regards, Zhao