From: Sean Christopherson <seanjc@google.com>
To: Xin3 Li <xin3.li@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"hpa@zytor.com" <hpa@zytor.com>,
Weijiang Yang <weijiang.yang@intel.com>,
Kai Huang <kai.huang@intel.com>
Subject: Re: [PATCH v5 1/2] KVM: VMX: Cleanup VMX basic information defines and usages
Date: Tue, 13 Feb 2024 17:25:14 -0800 [thread overview]
Message-ID: <ZcwWeiNstRNHQiI6@google.com> (raw)
In-Reply-To: <SA1PR11MB67347AE5FD9A8710F3921D13A84E2@SA1PR11MB6734.namprd11.prod.outlook.com>
On Wed, Feb 14, 2024, Xin3 Li wrote:
> > VMX_EPT_PAGE_WALK_4_BIT)))
> > return false;
> > break;
> > default:
> > return false;
> > }
> >
>
> I see your point here. But "#define VMX_EPTP_MT_WB 0x6ull" seems to define
> its own memory type 0x6. I think what we want is:
>
> /* in a pat/mtrr header */
> #define MEM_TYPE_WB 0x6
>
> /* vmx.h */
> #define VMX_EPTP_MT_WB MEM_TYPE_WB
>
> if it's not regarded as another layer of indirect.
Heh, yep, I already had this:
/* The EPTP memtype is encoded in bits 2:0, i.e. doesn't need to be shifted. */
#define VMX_EPTP_MT_MASK 0x7ull
#define VMX_EPTP_MT_WB X86_MEMTYPE_WB
#define VMX_EPTP_MT_UC X86_MEMTYPE_UC
next prev parent reply other threads:[~2024-02-14 1:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-06 18:20 [PATCH v5 1/2] KVM: VMX: Cleanup VMX basic information defines and usages Xin Li
2024-02-06 18:20 ` [PATCH v5 2/2] KVM: VMX: Cleanup VMX misc " Xin Li
2024-02-13 22:55 ` Sean Christopherson
2024-02-13 22:47 ` [PATCH v5 1/2] KVM: VMX: Cleanup VMX basic " Sean Christopherson
2024-02-14 0:46 ` Li, Xin3
2024-02-14 1:25 ` Sean Christopherson [this message]
2024-02-14 2:23 ` Li, Xin3
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