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From: Zhao Liu <zhao1.liu@linux.intel.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Eric Blake" <eblake@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org,
	"Zhenyu Wang" <zhenyu.z.wang@intel.com>,
	"Zhuocheng Ding" <zhuocheng.ding@intel.com>,
	"Babu Moger" <babu.moger@amd.com>,
	"Yongwei Ma" <yongwei.ma@intel.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Robert Hoo" <robert.hu@linux.intel.com>
Subject: Re: [PATCH v9 06/21] i386/cpu: Use APIC ID info to encode cache topo in CPUID[4]
Date: Tue, 12 Mar 2024 17:04:21 +0800	[thread overview]
Message-ID: <ZfAalR49aErs2/M1@intel.com> (raw)
In-Reply-To: <164e9fe1-c89d-4354-a7f7-a565c624934e@intel.com>

On Mon, Mar 11, 2024 at 05:03:02PM +0800, Xiaoyao Li wrote:
> Date: Mon, 11 Mar 2024 17:03:02 +0800
> From: Xiaoyao Li <xiaoyao.li@intel.com>
> Subject: Re: [PATCH v9 06/21] i386/cpu: Use APIC ID info to encode cache
>  topo in CPUID[4]
> 
> On 3/10/2024 9:38 PM, Zhao Liu wrote:
> > Hi Xiaoyao,
> > 
> > > >                case 3: /* L3 cache info */
> > > > -                die_offset = apicid_die_offset(&topo_info);
> > > >                    if (cpu->enable_l3_cache) {
> > > > +                    addressable_threads_width = apicid_die_offset(&topo_info);
> > > 
> > > Please get rid of the local variable @addressable_threads_width.
> > > 
> > > It is truly confusing.
> > 
> > There're several reasons for this:
> > 
> > 1. This commit is trying to use APIC ID topology layout to decode 2
> > cache topology fields in CPUID[4], CPUID.04H:EAX[bits 25:14] and
> > CPUID.04H:EAX[bits 31:26]. When there's a addressable_cores_width to map
> > to CPUID.04H:EAX[bits 31:26], it's more clear to also map
> > CPUID.04H:EAX[bits 25:14] to another variable.
> 
> I don't dislike using a variable. I dislike the name of that variable since
> it's misleading

Names are hard to choose...

> 
> > 2. All these 2 variables are temporary in this commit, and they will be
> > replaed by 2 helpers in follow-up cleanup of this series.
> 
> you mean patch 20?
> 
> I don't see how removing the local variable @addressable_threads_width
> conflicts with patch 20. As a con, it introduces code churn.

Yes...I prefer to wrap it in variables in advance, then the meaning of
the fields is clearer I think.

> > 3. Similarly, to make it easier to clean up later with the helper and
> > for more people to review, it's neater to explicitly indicate the
> > CPUID.04H:EAX[bits 25:14] with a variable here.
> 
> If you do want keeping the variable. Please add a comment above it to
> explain the meaning.
>

OK, I'll add comments for both 2 variables. Thanks!


  reply	other threads:[~2024-03-12  8:50 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-27 10:32 [PATCH v9 00/21] Introduce smp.modules for x86 in QEMU Zhao Liu
2024-02-27 10:32 ` [PATCH v9 01/21] hw/core/machine: Introduce the module as a CPU topology level Zhao Liu
2024-02-27 10:32 ` [PATCH v9 02/21] hw/core/machine: Support modules in -smp Zhao Liu
2024-02-28  9:56   ` Markus Armbruster
2025-10-09 11:40     ` Markus Armbruster
2025-10-13  7:33       ` Zhao Liu
2024-03-11 10:22   ` Mi, Dapeng
2024-03-12 10:12     ` Zhao Liu
2024-02-27 10:32 ` [PATCH v9 03/21] hw/core: Introduce module-id as the topology subindex Zhao Liu
2024-02-28  9:57   ` Markus Armbruster
2024-02-27 10:32 ` [PATCH v9 04/21] hw/core: Support module-id in numa configuration Zhao Liu
2024-02-27 10:32 ` [PATCH v9 05/21] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2024-02-27 10:32 ` [PATCH v9 06/21] i386/cpu: Use APIC ID info to encode cache topo in CPUID[4] Zhao Liu
2024-03-09 13:39   ` Xiaoyao Li
2024-03-10 13:38     ` Zhao Liu
2024-03-11  8:23       ` Zhao Liu
2024-03-11  9:03       ` Xiaoyao Li
2024-03-12  9:04         ` Zhao Liu [this message]
2024-02-27 10:32 ` [PATCH v9 07/21] i386/cpu: Use APIC ID info get NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-02-29 15:13   ` Moger, Babu
2024-03-09 13:41   ` Xiaoyao Li
2024-02-27 10:32 ` [PATCH v9 08/21] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2024-03-09 13:48   ` Xiaoyao Li
2024-03-10 13:44     ` Zhao Liu
2024-02-27 10:32 ` [PATCH v9 09/21] i386/cpu: Introduce bitmap to cache available CPU topology levels Zhao Liu
2024-03-11  6:28   ` Xiaoyao Li
2024-03-11  8:19     ` Zhao Liu
2024-02-27 10:32 ` [PATCH v9 10/21] i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB] Zhao Liu
2024-02-27 10:32 ` [PATCH v9 11/21] i386/cpu: Decouple CPUID[0x1F] subleaf with specific topology level Zhao Liu
2024-03-11  8:45   ` Xiaoyao Li
2024-03-12 10:11     ` Zhao Liu
2024-02-27 10:32 ` [PATCH v9 12/21] i386: Introduce module level cpu topology to CPUX86State Zhao Liu
2024-02-27 10:32 ` [PATCH v9 13/21] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2024-02-27 10:32 ` [PATCH v9 14/21] i386: Expose module level in CPUID[0x1F] Zhao Liu
2024-02-27 10:32 ` [PATCH v9 15/21] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2024-02-27 10:32 ` [PATCH v9 16/21] i386/cpu: Introduce module-id to X86CPU Zhao Liu
2024-02-27 10:32 ` [PATCH v9 17/21] tests: Add test case of APIC ID for module level parsing Zhao Liu
2024-02-27 10:32 ` [PATCH v9 18/21] hw/i386/pc: Support smp.modules for x86 PC machine Zhao Liu
2024-02-28 21:22   ` Moger, Babu
2024-02-29  7:32     ` Zhao Liu
2024-02-29 15:11       ` Moger, Babu
2024-03-01  6:27         ` Zhao Liu
2024-02-27 10:32 ` [PATCH v9 19/21] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2024-02-27 10:32 ` [PATCH v9 20/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2024-02-27 10:32 ` [PATCH v9 21/21] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2024-02-29 15:11   ` Moger, Babu
2024-02-27 10:41 ` [PATCH v9 00/21] Introduce smp.modules for x86 in QEMU Zhao Liu
2024-03-08 15:20   ` Zhao Liu
2024-02-29 15:14 ` Moger, Babu
2024-03-08 16:36 ` Philippe Mathieu-Daudé
2024-03-09  0:49   ` Zhao Liu
2024-03-09 13:55     ` Philippe Mathieu-Daudé
2024-03-10 13:06       ` Zhao Liu

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