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[35.247.89.60]) by smtp.gmail.com with ESMTPSA id s8-20020a170902ea0800b001def99dc4d2sm6731245plg.96.2024.03.18.15.51.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 15:51:06 -0700 (PDT) Date: Mon, 18 Mar 2024 22:51:03 +0000 From: Mingwei Zhang To: Sean Christopherson Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Paolo Bonzini , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Jim Mattson Subject: Re: [PATCH 3/3] KVM: VMX: Disable LBR virtualization if the CPU doesn't support LBR callstacks Message-ID: References: <20240307011344.835640-1-seanjc@google.com> <20240307011344.835640-4-seanjc@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240307011344.835640-4-seanjc@google.com> On Wed, Mar 06, 2024, Sean Christopherson wrote: > Disable LBR virtualization if the CPU doesn't support callstacks, which > were introduced in HSW (see commit e9d7f7cd97c4 ("perf/x86/intel: Add > basic Haswell LBR call stack support"), as KVM unconditionally configures > the perf LBR event with PERF_SAMPLE_BRANCH_CALL_STACK, i.e. LBR > virtualization always fails on pre-HSW CPUs. > > Simply disable LBR support on such CPUs, as it has never worked, i.e. > there is no risk of breaking an existing setup, and figuring out a way > to performantly context switch LBRs on old CPUs is not worth the effort. > > Fixes: be635e34c284 ("KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES") > Cc: Mingwei Zhang > Cc: Jim Mattson > Signed-off-by: Sean Christopherson Tested-by: Mingwei Zhang > --- > arch/x86/kvm/vmx/vmx.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 2a7cd66988a5..25a7652bee7c 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -7859,7 +7859,15 @@ static __init u64 vmx_get_perf_capabilities(void) > > if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) { > x86_perf_get_lbr(&vmx_lbr_caps); > - if (vmx_lbr_caps.nr) > + > + /* > + * KVM requires LBR callstack support, as the overhead due to > + * context switching LBRs without said support is too high. > + * See intel_pmu_create_guest_lbr_event() for more info. > + */ > + if (!vmx_lbr_caps.has_callstack) > + memset(&vmx_lbr_caps, 0, sizeof(vmx_lbr_caps)); > + else if (vmx_lbr_caps.nr) > perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT; > } > > -- > 2.44.0.278.ge034bb2e1d-goog >