Re: [PATCH v19 083/130] KVM: TDX: Add TSX_CTRL msr into uret_msrs list

Isaku Yamahata
2024-04-12T20:35:05Z

On Sun, Apr 07, 2024 at 03:05:21PM +0800,
Binbin Wu <binbin.wu@linux.intel.com> wrote:

>
>
> On 2/26/2024 4:26 PM, isaku.yamahata@intel.com wrote:
> > From: Yang Weijiang <weijiang.yang@intel.com>
> >
> > TDX module resets the TSX_CTRL MSR to 0 at TD exit if TSX is enabled for
> > TD. Or it preserves the TSX_CTRL MSR if TSX is disabled for TD. VMM can
> > rely on uret_msrs mechanism to defer the reload of host value until exiting
> > to user space.
> >
> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> > ---
> > v19:
> > - fix the type of tdx_uret_tsx_ctrl_slot. unguent int => int.
> > ---
> > arch/x86/kvm/vmx/tdx.c | 33 +++++++++++++++++++++++++++++++--
> > arch/x86/kvm/vmx/tdx.h | 8 ++++++++
> > 2 files changed, 39 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
> > index 7e2b1e554246..83dcaf5b6fbd 100644
> > --- a/arch/x86/kvm/vmx/tdx.c
> > +++ b/arch/x86/kvm/vmx/tdx.c
> > @@ -547,14 +547,21 @@ static struct tdx_uret_msr tdx_uret_msrs[] = {
> > {.msr = MSR_LSTAR,},
> > {.msr = MSR_TSC_AUX,},
> > };
> > +static int tdx_uret_tsx_ctrl_slot;
> > -static void tdx_user_return_update_cache(void)
> > +static void tdx_user_return_update_cache(struct kvm_vcpu *vcpu)
> > {
> > int i;
> > for (i = 0; i < ARRAY_SIZE(tdx_uret_msrs); i++)
> > kvm_user_return_update_cache(tdx_uret_msrs[i].slot,
> > tdx_uret_msrs[i].defval);
> > + /*
> > + * TSX_CTRL is reset to 0 if guest TSX is supported. Otherwise
> > + * preserved.
> > + */
> > + if (to_kvm_tdx(vcpu->kvm)->tsx_supported && tdx_uret_tsx_ctrl_slot != -1)
>
> If to_kvm_tdx(vcpu->kvm)->tsx_supported is true, tdx_uret_tsx_ctrl_slot
> shouldn't be -1 at this point.
> Otherwise, it's a KVM bug, right?
> Not sure if it needs a warning if tdx_uret_tsx_ctrl_slot is -1, or just
> remove the check?

You're right. Let me remove the != -1 check.
--
Isaku Yamahata <isaku.yamahata@intel.com>