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AJvYcCUV6Ock+mNECB6yaT5TlVECRq4N8TJfmEwV3B+mOhshaZTtFr5/Gv3Rx+gYq4Eza1hOI4VaY9GuXSPhUpytAH2/o85r X-Gm-Message-State: AOJu0YwKbhZTQfZEdo/u1MG/tNCS9FiQkZEz+ydzNJO8HaoGlt71cgHc h0f9CEImT4SKiW909t7MsWpf/ma4AhY2AhLm9pvozY3MNR6v84wKqNm/oqF94RfplRMAYKg/RIL FaA== X-Google-Smtp-Source: AGHT+IEkfHzR+4m+Th6V2ts/oqUxiy0aOaoToSSBUi9LCjdVmQdDERNlhn8Fq9lXwBTSzwWtpL0hLyOgrA4= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a81:6cc9:0:b0:615:2597:7246 with SMTP id h192-20020a816cc9000000b0061525977246mr83113ywc.6.1712863379573; Thu, 11 Apr 2024 12:22:59 -0700 (PDT) Date: Thu, 11 Apr 2024 12:22:58 -0700 In-Reply-To: <20240126085444.324918-9-xiong.y.zhang@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240126085444.324918-1-xiong.y.zhang@linux.intel.com> <20240126085444.324918-9-xiong.y.zhang@linux.intel.com> Message-ID: Subject: Re: [RFC PATCH 08/41] KVM: x86/pmu: Add get virtual LVTPC_MASK bit function From: Sean Christopherson To: Xiong Zhang Cc: pbonzini@redhat.com, peterz@infradead.org, mizhang@google.com, kan.liang@intel.com, zhenyuw@linux.intel.com, dapeng1.mi@linux.intel.com, jmattson@google.com, kvm@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, zhiyuan.lv@intel.com, eranian@google.com, irogers@google.com, samantha.alt@intel.com, like.xu.linux@gmail.com, chao.gao@intel.com, Xiong Zhang Content-Type: text/plain; charset="us-ascii" On Fri, Jan 26, 2024, Xiong Zhang wrote: > From: Xiong Zhang > > On PMU passthrough mode, guest virtual LVTPC_MASK bit must be reflected > onto HW, especially when guest clear it, the HW bit should be cleared also. > Otherwise processor can't generate PMI until the HW mask bit is cleared. > > This commit add a function to get virtual LVTPC_MASK bit, so that No "This commit", "This patch", or any other variation. Please read through: Documentation/process/maintainer-tip.rst Documentation/process/maintainer-kvm-x86.rst > it can be set onto HW later. > > Signed-off-by: Xiong Zhang > --- > arch/x86/kvm/lapic.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h > index e30641d5ac90..dafae44325d1 100644 > --- a/arch/x86/kvm/lapic.h > +++ b/arch/x86/kvm/lapic.h > @@ -277,4 +277,10 @@ static inline u8 kvm_xapic_id(struct kvm_lapic *apic) > { > return kvm_lapic_get_reg(apic, APIC_ID) >> 24; > } > + > +static inline bool kvm_lapic_get_lvtpc_mask(struct kvm_vcpu *vcpu) > +{ > + return lapic_in_kernel(vcpu) && > + (kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTPC) & APIC_LVT_MASKED); > +} As suggested in the previous patch, I'm pretty sure we can safely omit this helper. > #endif > -- > 2.34.1 >