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AJvYcCVifn5YZxWU0mrSL/4soITssy3IImDmR6UJn2EBS+K1YgMBiq1s2/42In0tsM9QXaRKUDZWUwL7GxSZjhw7fn9Sg73y X-Gm-Message-State: AOJu0Yy2mxwpzkNFILxLwReKewmFPoFXGcunrJuVKQ89RRRttGZgeGgv vlMaC/Go44A80wFEbyxIDmZhZTNvOJPDWcMjkXPLxBQYK/xh57IJxkVGNELPOb6uDZoDFnQfzaK TTg== X-Google-Smtp-Source: AGHT+IF7ewIFf4asaLVdd36tPhS/2ZhvyuhQ5JaF/1Gy7paYiH3nJdGJyIbHKj5e9VA3LCVIDmZCPxJhvX4= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a0d:e386:0:b0:61a:b2d4:a3fb with SMTP id m128-20020a0de386000000b0061ab2d4a3fbmr1243077ywe.8.1714062661606; Thu, 25 Apr 2024 09:31:01 -0700 (PDT) Date: Thu, 25 Apr 2024 09:30:59 -0700 In-Reply-To: <9c6119dacac30750defb2b799f1a192c516ac79c.camel@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <3771fee103b2d279c415e950be10757726a7bd3b.camel@intel.com> <6e83e89f145aee496c6421fc5a7248aae2d6f933.camel@intel.com> <61ec08765f0cd79f2d5ea1e2acf285ea9470b239.camel@intel.com> <9c6119dacac30750defb2b799f1a192c516ac79c.camel@intel.com> Message-ID: Subject: Re: [PATCH v19 023/130] KVM: TDX: Initialize the TDX module when loading the KVM intel kernel module From: Sean Christopherson To: Kai Huang Cc: Tina Zhang , Hang Yuan , Bo2 Chen , "sagis@google.com" , "isaku.yamahata@gmail.com" , "linux-kernel@vger.kernel.org" , Erdem Aktas , "kvm@vger.kernel.org" , "pbonzini@redhat.com" , Isaku Yamahata , "isaku.yamahata@linux.intel.com" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Tue, Apr 23, 2024, Kai Huang wrote: > On Tue, 2024-04-23 at 22:59 +0000, Huang, Kai wrote: > > > Right, but that doesn't say why the #UD occurred.=C2=A0 The macro dre= sses it up in > > > TDX_SW_ERROR so that KVM only needs a single parser, but at the end o= f the day > > > KVM is still only going to see that SEAMCALL hit a #UD. > >=20 > > Right.=C2=A0 But is there any problem here?=C2=A0 I thought the point w= as we can > > just use the error code to tell what went wrong. >=20 > Oh, I guess I was replying too quickly. From the spec, #UD happens when >=20 > IF not in VMX operation or inSMM or inSEAM or=C2=A0 > ((IA32_EFER.LMA & CS.L) =3D=3D 0) > THEN #UD; >=20 > Are you worried about #UD was caused by other cases rather than "not in > VMX operation"? Yes. =20 > But it's quite obvious the other 3 cases are not possible, correct? The spec I'm looking at also has: If IA32_VMX_PROCBASED_CTLS3[5] is 0. And anecdotally, I know of at least one crash in our production environment= where a VMX instruction hit a seemingly spurious #UD, i.e. it's not impossible fo= r a ucode bug or hardware defect to cause problems. That's obviously _extremel= y_ unlikely, but that's why I emphasized that sanity checking CR4.VMXE is chea= p. Practically speaking it costs nothing, so IMO it's worth adding even if the= odds of it ever being helpful are one-in-and-million.