From: Sean Christopherson <seanjc@google.com>
To: Jim Mattson <jmattson@google.com>
Cc: Venkatesh Srinivas <venkateshs@chromium.org>,
kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH] KVM: x86: AMD's IBPB is not equivalent to Intel's IBPB
Date: Fri, 16 Aug 2024 07:25:11 -0700 [thread overview]
Message-ID: <Zr9hRydHFvPIMfUp@google.com> (raw)
In-Reply-To: <CALMp9eSBNjSXgsbhau-c68Ow_YoLvWBK6oUc1v1DqSfmDskmhg@mail.gmail.com>
On Thu, Apr 11, 2024, Jim Mattson wrote:
> On Thu, Apr 11, 2024 at 6:32 PM Venkatesh Srinivas
> <venkateshs@chromium.org> wrote:
> >
> > On Thu, Apr 11, 2024 at 1:59 PM Jim Mattson <jmattson@google.com> wrote:
> > >
> > > From Intel's documention [1], "CPUID.(EAX=07H,ECX=0):EDX[26]
> > > enumerates support for indirect branch restricted speculation (IBRS)
> > > and the indirect branch predictor barrier (IBPB)." Further, from [2],
> > > "Software that executed before the IBPB command cannot control the
> > > predicted targets of indirect branches (4) executed after the command
> > > on the same logical processor," where footnote 4 reads, "Note that
> > > indirect branches include near call indirect, near jump indirect and
> > > near return instructions. Because it includes near returns, it follows
> > > that **RSB entries created before an IBPB command cannot control the
> > > predicted targets of returns executed after the command on the same
> > > logical processor.**" [emphasis mine]
> > >
> > > On the other hand, AMD's "IBPB may not prevent return branch
> > > predictions from being specified by pre-IBPB branch targets" [3].
> > >
> > > Since Linux sets the synthetic feature bit, X86_FEATURE_IBPB, on AMD
> > > CPUs that implement the weaker version of IBPB, it is incorrect to
> > > infer from this and X86_FEATURE_IBRS that the CPU supports the
> > > stronger version of IBPB indicated by CPUID.(EAX=07H,ECX=0):EDX[26].
> >
> > AMD's IBPB does apply to RET predictions if Fn8000_0008_EBX[IBPB_RET] = 1.
> > Spot checking, Zen4 sets that bit; and the bulletin doesn't apply there.
>
> So, with a definition of X86_FEATURE_AMD_IBPB_RET, this could be:
>
> if (boot_cpu_has(X86_FEATURE_AMD_IBPB_RET) &&
> boot_cpu_has(X86_FEATURE_IBRS))
> kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL);
>
> And, in the other direction,
>
> if (boot_cpu_has(X86_FEATURE_SPEC_CTRL))
> kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB_RET);
Jim, are you planning on sending a v2 with Venkatesh's suggested solution?
next prev parent reply other threads:[~2024-08-16 14:25 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-11 20:58 [PATCH] KVM: x86: AMD's IBPB is not equivalent to Intel's IBPB Jim Mattson
2024-04-12 1:32 ` Venkatesh Srinivas
2024-04-12 2:57 ` Jim Mattson
2024-05-07 20:32 ` Jim Mattson
2024-05-08 15:42 ` Sean Christopherson
2024-08-16 14:25 ` Sean Christopherson [this message]
2024-08-16 17:12 ` Jim Mattson
2024-08-16 21:26 ` Sean Christopherson
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