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AJvYcCVKfDa+UYZPpuNbsUCL+buIzwL79dIVUKf6ByEZRD937qMei+8VcsnL0CSZ9spYgQU8sdg=@vger.kernel.org X-Gm-Message-State: AOJu0Yy0DtiaEzPhYka8bfGssqa27Yq9wzomuKPHVs2q2j7rBBTLGqF4 4hBn7Pd6w8rz87gurHs9eZ4PrNqFhLe/LuP1OEpwkFpixG49cZzLnNwcr4iFAO1jfL85Xs7CeHd Wdg== X-Google-Smtp-Source: AGHT+IHDg8stp6UcMsgIAPMCmvDepgyuJjKptz1kBnuCpGE/lsZDNgE5UrEc9f5lUeuznGWGExf5ahzsptQ= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:9d:3983:ac13:c240]) (user=seanjc job=sendgmr) by 2002:a05:6902:4ac:b0:e28:fe07:e7d8 with SMTP id 3f1490d57ef6-e28fe439b20mr44444276.10.1728490591634; Wed, 09 Oct 2024 09:16:31 -0700 (PDT) Date: Wed, 9 Oct 2024 09:16:30 -0700 In-Reply-To: <20241009092850.197575-16-nikunj@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241009092850.197575-1-nikunj@amd.com> <20241009092850.197575-16-nikunj@amd.com> Message-ID: Subject: Re: [PATCH v12 15/19] tsc: Upgrade TSC clocksource rating From: Sean Christopherson To: Nikunj A Dadhania Cc: linux-kernel@vger.kernel.org, thomas.lendacky@amd.com, bp@alien8.de, x86@kernel.org, kvm@vger.kernel.org, mingo@redhat.com, tglx@linutronix.de, dave.hansen@linux.intel.com, pgonda@google.com, pbonzini@redhat.com Content-Type: text/plain; charset="us-ascii" On Wed, Oct 09, 2024, Nikunj A Dadhania wrote: > In virtualized environments running on modern CPUs, the underlying > platforms guarantees to have a stable, always running TSC, i.e. that the > TSC is a superior timesource as compared to other clock sources (such as > kvmclock, HPET, ACPI timer, APIC, etc.). > > Upgrade the rating of the early and regular clock source to prefer TSC over > other clock sources when TSC is invariant, non-stop and stable. > > Suggested-by: Thomas Gleixner > Signed-off-by: Nikunj A Dadhania > --- > arch/x86/kernel/tsc.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > index c83f1091bb4f..8150f2104474 100644 > --- a/arch/x86/kernel/tsc.c > +++ b/arch/x86/kernel/tsc.c > @@ -1264,6 +1264,21 @@ static void __init check_system_tsc_reliable(void) > tsc_disable_clocksource_watchdog(); > } > > +static void __init upgrade_clock_rating(struct clocksource *tsc_early, > + struct clocksource *tsc) > +{ > + /* > + * Upgrade the clock rating for TSC early and regular clocksource when > + * the underlying platform provides non-stop, invaraint and stable TSC. > + */ > + if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && > + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && > + !tsc_unstable) { Somewhat of a side topic, should KVM (as a hypervisor) be enumerating something to guests to inform them that the TSC is reliable, i.e. that X86_FEATURE_TSC_RELIABLE can be forced? Or, should KVM (as the guest) infer X86_FEATURE_TSC_RELIABLE if INVARIANT_TSC is advertised by KVM (the hyperivosor)? Also, why on earth is 0x8000_0007.EDX manually scattered via x86_power? > + tsc_early->rating = 499; > + tsc->rating = 500; > + } > +}