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AJvYcCW88/2IOouEdJ9SOojD5wpibEcpSID29zsUSLhyi29Yggb+F1I4upLIWawpZ3tPrgVty8c=@vger.kernel.org X-Gm-Message-State: AOJu0YzaIqtUR0xUWQ0dyIIxGMfzFkldmHPkuzPLe5MtwXum83puK5DJ 80nk37XOWX00DNMC/bbXib/CkPUiZrqXiCs7dfXb1BcJk2Zcn+Yiso5AiQNug+2orZrqfE/GP9N u8g== X-Google-Smtp-Source: AGHT+IEquI/dcGuvHtAD+d8/HkmmYalvr5Dpl8EjyXsUW0Mn0a/8F/NJjbLqp6zWRl9i1E0sX+PTajVAI8c= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:9d:3983:ac13:c240]) (user=seanjc job=sendgmr) by 2002:a63:f706:0:b0:7e6:c3f2:24d1 with SMTP id 41be03b00d2f7-7eaa6c6493bmr8214a12.4.1729181109079; Thu, 17 Oct 2024 09:05:09 -0700 (PDT) Date: Thu, 17 Oct 2024 09:05:07 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241002124324.14360-1-mankku@gmail.com> Message-ID: Subject: Re: [PATCH 1/1] KVM: nVMX: update VPPR on vmlaunch/vmresume From: Sean Christopherson To: Chao Gao Cc: "Markku =?utf-8?Q?Ahvenj=C3=A4rvi?=" , bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, janne.karhunen@gmail.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, mingo@redhat.com, pbonzini@redhat.com, tglx@linutronix.de, x86@kernel.org Content-Type: text/plain; charset="us-ascii" On Thu, Oct 17, 2024, Chao Gao wrote: > >> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > >> index 5bb481aefcbc..d6a03c30f085 100644 > >> --- a/arch/x86/kvm/lapic.c > >> +++ b/arch/x86/kvm/lapic.c > >> @@ -800,6 +800,9 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) > >> if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) > >> return; > >> > >> + if (is_guest_mode(apic->vcpu)) > > > >As above, I think this needs to be > > > > if (is_guest_mode(apic->vcpu) && !nested_cpu_has_vid(get_vmcs12(vcpu))) > > > >because if virtual interrupt delivery is enabled, then EOIs are virtualized. > >Which means that this needs to be handled in vmx_hwapic_isr_update(). > > I'm not sure if nested_cpu_has_vid() is necessary. My understanding is that > when a bit in the vCPU's vISR is cleared, the vCPU's SVI (i.e., SVI in vmcs01) > may be stale and so needs an update if vmcs01 isn't the active VMCS (i.e., the > vCPU is in guest mode). > > If L1 enables VID and EOIs from L2 are virtualized by KVM (L0), KVM shouldn't > call this function in the first place. Because KVM should update the > 'virt-APIC' page in VMCS12, rather than updating the vISR of the vCPU. Ah, right. And KVM handles that in nested_vmx_l1_wants_exit(), by forwarding all APICv exits to L1: case EXIT_REASON_APIC_ACCESS: case EXIT_REASON_APIC_WRITE: case EXIT_REASON_EOI_INDUCED: /* * The controls for "virtualize APIC accesses," "APIC- * register virtualization," and "virtual-interrupt * delivery" only come from vmcs12. */ return true;