[PATCH v4 9/9] i386/cpu: add has_caches flag to check smp_cache configuration

Zhao Liu
2024-10-22T13:36:59Z

From: Alireza Sanaee <alireza.sanaee@huawei.com>

Add has_caches flag to SMPCompatProps, which helps in avoiding
extra checks for every single layer of caches in x86 (and ARM in
future).

Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
Note: Picked from Alireza's series with the changes:
* Moved the flag to SMPCompatProps with a new name "has_caches".
This way, it remains consistent with the function and style of
"has_clusters" in SMPCompatProps.
* Dropped my previous TODO with the new flag.
---
Changes since Patch v2:
* Picked a new patch frome Alireza's ARM smp-cache series.
---
hw/core/machine-smp.c | 2 ++
include/hw/boards.h | 3 +++
target/i386/cpu.c | 11 +++++------
3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
index 640b2114b429..6ae7c4765402 100644
--- a/hw/core/machine-smp.c
+++ b/hw/core/machine-smp.c
@@ -324,6 +324,8 @@ bool machine_parse_smp_cache(MachineState *ms,
return false;
}
}
+
+ mc->smp_props.has_caches = true;
return true;
}

diff --git a/include/hw/boards.h b/include/hw/boards.h
index 192f78539a6e..e6680701eec3 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -156,6 +156,8 @@ typedef struct {
* @modules_supported - whether modules are supported by the machine
* @cache_supported - whether cache (l1d, l1i, l2 and l3) configuration are
* supported by the machine
+ * @has_caches - whether cache properties are explicitly specified in the
+ * user provided smp-cache configuration
*/
typedef struct {
bool prefer_sockets;
@@ -166,6 +168,7 @@ typedef struct {
bool drawers_supported;
bool modules_supported;
bool cache_supported[CACHE_LEVEL_AND_TYPE__MAX];
+ bool has_caches;
} SMPCompatProps;

/**
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b6e12b46c9cc..9a81402e71c4 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7884,13 +7884,12 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)

#ifndef CONFIG_USER_ONLY
MachineState *ms = MACHINE(qdev_get_machine());
+ MachineClass *mc = MACHINE_GET_CLASS(ms);

- /*
- * TODO: Add a SMPCompatProps.has_caches flag to avoid useless updates
- * if user didn't set smp_cache.
- */
- if (!x86_cpu_update_smp_cache_topo(ms, cpu, errp)) {
- return;
+ if (mc->smp_props.has_caches) {
+ if (!x86_cpu_update_smp_cache_topo(ms, cpu, errp)) {
+ return;
+ }
}

qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
--
2.34.1