Re: [PATCH 2/2] KVM: VMX: Allow toggling bits in MSR_IA32_RTIT_CTL when enable bit is cleared

Xiaoyao Li
2024-11-04T01:58:02Z

On 11/2/2024 2:50 AM, Sean Christopherson wrote:
> From: Adrian Hunter <adrian.hunter@intel.com>
>
> Allow toggling other bits in MSR_IA32_RTIT_CTL if the enable bit is being
> cleared, the existing logic simply ignores the enable bit. E.g. KVM will
> incorrectly reject a write of '0' to stop tracing.

Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>

> Fixes: bf8c55d8dc09 ("KVM: x86: Implement Intel PT MSRs read/write emulation")
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> [sean: rework changelog, drop stable@]
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
> arch/x86/kvm/vmx/vmx.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 087504fb1589..9b9d115c4824 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -1636,7 +1636,8 @@ static int vmx_rtit_ctl_check(struct kvm_vcpu *vcpu, u64 data)
> * result in a #GP unless the same write also clears TraceEn.
> */
> if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) &&
> - ((vmx->pt_desc.guest.ctl ^ data) & ~RTIT_CTL_TRACEEN))
> + (data & RTIT_CTL_TRACEEN) &&
> + data != vmx->pt_desc.guest.ctl)
> return 1;
>
> /*