[PATCH v6 51/60] i386/tdx: Mask off CPUID bits by unsupported XFAM

Xiaoyao Li
2024-11-05T06:40:01Z

Mask off the CPUID bits as unsupported if its matched XFAM bit is
not supported. Otherwise, it might fail the check in setup_td_xfam() as
unsupported XFAM being requested.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/kvm/tdx.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)

diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index 5ac5f93907ca..e7e0f073dfc9 100644
--- a/target/i386/kvm/tdx.c
+++ b/target/i386/kvm/tdx.c
@@ -24,6 +24,7 @@
#include <linux/kvm_para.h>

#include "cpu.h"
+#include "cpu-internal.h"
#include "host-cpu.h"
#include "hw/i386/e820_memory_layout.h"
#include "hw/i386/x86.h"
@@ -585,6 +586,42 @@ static void tdx_mask_cpuid_by_attrs(uint32_t feature, uint32_t index,
}
}

+static void tdx_mask_cpuid_by_xfam(uint32_t feature, uint32_t index,
+ int reg, uint32_t *value)
+{
+ const FeatureWordInfo *f;
+ const ExtSaveArea *esa;
+ uint64_t unavail = 0;
+ int i;
+
+ assert(tdx_caps);
+
+ for (i = 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
+ if ((1ULL << i) & tdx_caps->supported_xfam) {
+ continue;
+ }
+
+ if (!((1ULL << i) & CPUID_XSTATE_MASK)) {
+ continue;
+ }
+
+ esa = &x86_ext_save_areas[i];
+ f = &feature_word_info[esa->feature];
+ assert(f->type == CPUID_FEATURE_WORD);
+ if (f->cpuid.eax != feature ||
+ (f->cpuid.needs_ecx && f->cpuid.ecx != index) ||
+ f->cpuid.reg != reg) {
+ continue;
+ }
+
+ unavail |= esa->bits;
+ }
+
+ if (unavail) {
+ *value &= ~unavail;
+ }
+}
+
static uint32_t tdx_adjust_cpuid_features(X86ConfidentialGuest *cg,
uint32_t feature, uint32_t index,
int reg, uint32_t value)
@@ -619,6 +656,7 @@ static uint32_t tdx_adjust_cpuid_features(X86ConfidentialGuest *cg,
}

tdx_mask_cpuid_by_attrs(feature, index, reg, &value);
+ tdx_mask_cpuid_by_xfam(feature, index, reg, &value);

e = cpuid_find_entry(&tdx_fixed0_bits.cpuid, feature, index);
if (e) {
--
2.34.1