From: Isaku Yamahata <isaku.yamahata@intel.com>
To: Nikunj A Dadhania <nikunj@amd.com>
Cc: seanjc@google.com, pbonzini@redhat.com, kvm@vger.kernel.org,
thomas.lendacky@amd.com, santosh.shukla@amd.com, bp@alien8.de,
ketanch@iitk.ac.in, rick.p.edgecombe@intel.com,
mtosatti@redhat.com
Subject: Re: [RFC PATCH 0/5] Enable Secure TSC for SEV-SNP
Date: Thu, 21 Nov 2024 16:41:24 -0800 [thread overview]
Message-ID: <Zz/TNEYIi/AFbOCv@ls.amr.corp.intel.com> (raw)
In-Reply-To: <20240829053748.8283-1-nikunj@amd.com>
On Thu, Aug 29, 2024 at 11:07:43AM +0530,
Nikunj A Dadhania <nikunj@amd.com> wrote:
> TSC value calculations for the guest are controlled by the hypervisor. A
> malicious hypervisor can prevent guest from moving forward. The Secure TSC
> feature for SEV-SNP allows guests to securely use the RDTSC and RDTSCP
> instructions. This ensures the guest gets a consistent view of time and
> prevents a malicious hypervisor from making it appear that time rolls
> backwards, advancing at an unusually fast rate, or employing similar tricks.
> For more details, please refer to "Secure Nested Paging (SEV-SNP)" section,
> subsection "Secure TSC" of APM Volume 2
Hello. Although I replied at [1], let raise this here too.
Don't we need to prevent the KVM from modifying KVM vcpu tsc offset/multiplier
(vcpu->arch.tsc_offset etc.)?
As long as I understand, the spec (APM volume2) says the timer interrupt (TSC
deadline timer or local APIC timer) is not virtualized by hardware so that KVM
emulates timer interrupt.
If KVM modifies guest offset/multiplier from the original value
(the SEV-SNP secure tsc uses or the TDX module uses), the timer interrupt
emulation by KVM will be inaccurate. It's injected late or early than
the guest expects.
Please notice that kvm_arch_vcpu_create() calls
kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz) after
kvm_x86_call(vcpu_create)().
[1] https://lore.kernel.org/kvm/Zz%2FDGOoo%2FmEvULiG@ls.amr.corp.intel.com/
> This patchset is also available at:
>
> https://github.com/AMDESE/linux-kvm/tree/sectsc-host-latest
>
> and is based on v6.11-rc5
>
> Testing SecureTSC
> -----------------
>
> SecureTSC Guest patches:
> https://github.com/AMDESE/linux-kvm/tree/sectsc-guest-latest
>
> QEMU changes:
> https://github.com/nikunjad/qemu/tree/snp-securetsc-latest
>
> QEMU commandline SEV-SNP with SecureTSC:
>
> qemu-system-x86_64 -cpu EPYC-Milan-v2 -smp 4 \
> -object memory-backend-memfd,id=ram1,size=1G,share=true,prealloc=false,reserve=false \
> -object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on \
> -machine q35,confidential-guest-support=sev0,memory-backend=ram1 \
> ...
Did you test it with tsc frequency/offset different from the kvm system default
value (max_tsc_khz or kvm_caps.default_tsc_scaling_ranio etc.)?
--
Isaku Yamahata <isaku.yamahata@intel.com>
prev parent reply other threads:[~2024-11-22 0:41 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-29 5:37 [RFC PATCH 0/5] Enable Secure TSC for SEV-SNP Nikunj A Dadhania
2024-08-29 5:37 ` [RFC PATCH 1/5] x86/cpufeatures: Add SNP Secure TSC Nikunj A Dadhania
2024-08-29 13:22 ` Borislav Petkov
2024-09-02 4:16 ` Nikunj A. Dadhania
2024-09-02 16:42 ` Borislav Petkov
2024-09-03 5:43 ` Nikunj A. Dadhania
2024-09-03 7:16 ` Borislav Petkov
2024-08-29 5:37 ` [RFC PATCH 2/5] KVM: SVM: Set TSC frequency for SecureTSC-enabled guests Nikunj A Dadhania
2024-08-29 5:37 ` [RFC PATCH 3/5] KVM: SVM: Add GUEST_TSC_FREQ MSR Nikunj A Dadhania
2024-08-29 5:37 ` [RFC PATCH 4/5] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled Nikunj A Dadhania
2024-08-29 5:37 ` [RFC PATCH 5/5] KVM: SVM: Add Secure TSC support for SNP Guest Nikunj A Dadhania
2024-11-22 0:41 ` Isaku Yamahata [this message]
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