From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 650FF15B97E for ; Wed, 20 Nov 2024 21:38:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.73 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732138685; cv=none; b=nAuuT7GdnZddh0f9nI/uuCisQ5Kp1dGFXnFpjOJBZmOylivYuIe+YfzPpwzg+zKeeVRWvD9XhNa7lFQjfUewzsNa1hE2AUsIgAk6J3d7mNqUsLCSvglE4CZSE9zKi/+WW8ENbWoadS77K0gS2k8xl2enyqarkDQciPZjHTpBGwU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732138685; c=relaxed/simple; bh=XlXZ4cnlFqDQru63uBgI0es1B56U7QsYTjA4nU2nuiw=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=gvHcr2gbM4Lel0nvmYYKvQvX/16RRMsuBiNHNbwbWCoKcEeXGX0pyb95WXErntjLd+63j1z6uL7iJ5HrRa23OGr5vg3IGfK8C5FEuIyDslZHmKvD+FNHNq1up/seqFAT4xjZW4iy4o1CGX/BNGOZQQ9fKGtzlvt3KWAPI4ghokM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=HQ4LVKjL; arc=none smtp.client-ip=209.85.216.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="HQ4LVKjL" Received: by mail-pj1-f73.google.com with SMTP id 98e67ed59e1d1-2ea21082c99so244892a91.3 for ; Wed, 20 Nov 2024 13:38:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1732138684; x=1732743484; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=hK50UHxviNBEUn8xmLOk7IXRFdynit29NKgyO3ZB+Yg=; b=HQ4LVKjLQZc2RAiC+lJJCqKdb0YdRqA5WnQuNRSgyo0Km+yIkYeAT3B+7O9GjO4Nqz vPGrBtev2onC/Qxdc60IgaxVOxlyYyAO6jtLk9LEaW45BvJht/UWxdiXhnDBbNE2cPPx B6KaIGiUM2rn0EEXqcRLZfEbA5SS51DjVcZdMPOSr1Bq36ti0fcrMbzxw2s9E0D3huC5 t1q9YpzVZLE2MSUXF++fqnPqMbPnrfxpBo7g5lVWGYGJt4tgxpzTIRU1ienYWhKuP/oa ILRyOA2eiMHqRI2Luh/zAC4IKaNVWAyq2qO0czZ77WJNuLAsImmPHXvL+UsRgYSalh3P ArwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732138684; x=1732743484; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=hK50UHxviNBEUn8xmLOk7IXRFdynit29NKgyO3ZB+Yg=; b=qxxKw2bBBUB+dqWji2IZxE7YM6dQ0WKxHHmpxykiK5UQ7tK0F0x+IGn9j0z6YFJ4cw opc0HjnfrmB/NNRImpROgcque0mzXTeKc+e36Du1MNC7gLBzERvf1VXXrUjbCgl5fg/K krMBzLXd0/QwJ48vSUlgH15hA/MKH2wRvWFy7sbXDofLAqWeW0zIf1cnf71wcLoe7aof 1lDmyikXRWZ/rKOa7kA/P7CA9Y/wXbBBZc217+de9GZXFM1SWdHAYg8LtGXrLLJsaecR jIXTV2XCyZI2XBo/idz0rYkkPtQkVrqMoKjlXrw+dHMGOybyVvjCpn5Uxa/3eKd36mwt L0Vw== X-Forwarded-Encrypted: i=1; AJvYcCVhVkjELo8O0wpGlWKQYXrLoSLQ4WdsRoS0VN5IyFHYPS5lURfoh2QHS4A1Pbv6l0KF/6M=@vger.kernel.org X-Gm-Message-State: AOJu0YwSPLWxb8Clyvef6BEaj9yM+I4HTQWA+aTPvM2XOPmEefHZAHQ7 lMllj1FwQVRGedHZ2Jqqe5kDcJXpcaWLuynDistsxQLPLWovLY8yhfaq9Ay2FbbN8WXALDI8BAK P8g== X-Google-Smtp-Source: AGHT+IGkxYnG+hLXLUpjac2R9wZO6qBF93t2mWzts65zA8N1GmLd1ZGgyzq7ef0A6DNF+APY83cNlfgUfQY= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:9d:3983:ac13:c240]) (user=seanjc job=sendgmr) by 2002:a17:90b:3508:b0:2ea:4154:640d with SMTP id 98e67ed59e1d1-2eaca0fdcc6mr2221a91.0.1732138683673; Wed, 20 Nov 2024 13:38:03 -0800 (PST) Date: Wed, 20 Nov 2024 13:38:02 -0800 In-Reply-To: <20240801045907.4010984-54-mizhang@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240801045907.4010984-1-mizhang@google.com> <20240801045907.4010984-54-mizhang@google.com> Message-ID: Subject: Re: [RFC PATCH v3 53/58] KVM: x86/pmu/svm: Set GuestOnly bit and clear HostOnly bit when guest write to event selectors From: Sean Christopherson To: Mingwei Zhang Cc: Paolo Bonzini , Xiong Zhang , Dapeng Mi , Kan Liang , Zhenyu Wang , Manali Shukla , Sandipan Das , Jim Mattson , Stephane Eranian , Ian Rogers , Namhyung Kim , gce-passthrou-pmu-dev@google.com, Samantha Alt , Zhiyuan Lv , Yanfei Xu , Like Xu , Peter Zijlstra , Raghavendra Rao Ananta , kvm@vger.kernel.org, linux-perf-users@vger.kernel.org Content-Type: text/plain; charset="us-ascii" On Thu, Aug 01, 2024, Mingwei Zhang wrote: > From: Sandipan Das > > On AMD platforms, there is no way to restore PerfCntrGlobalCtl at > VM-Entry or clear it at VM-Exit. Since the register states will be > restored before entering and saved after exiting guest context, the > counters can keep ticking and even overflow leading to chaos while > still in host context. > > To avoid this, the PERF_CTLx MSRs (event selectors) are always > intercepted. KVM will always set the GuestOnly bit and clear the > HostOnly bit so that the counters run only in guest context even if > their enable bits are set. Intercepting these MSRs is also necessary > for guest event filtering. > > Signed-off-by: Sandipan Das > Signed-off-by: Mingwei Zhang > --- > arch/x86/kvm/svm/pmu.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c > index cc03c3e9941f..2b7cc7616162 100644 > --- a/arch/x86/kvm/svm/pmu.c > +++ b/arch/x86/kvm/svm/pmu.c > @@ -165,7 +165,12 @@ static int amd_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > data &= ~pmu->reserved_bits; > if (data != pmc->eventsel) { > pmc->eventsel = data; > - kvm_pmu_request_counter_reprogram(pmc); > + if (is_passthrough_pmu_enabled(vcpu)) { > + data &= ~AMD64_EVENTSEL_HOSTONLY; > + pmc->eventsel_hw = data | AMD64_EVENTSEL_GUESTONLY; Do both in a single statment, i.e. pmc->eventsel_hw = (data & ~AMD64_EVENTSEL_HOSTONLY) | AMD64_EVENTSEL_GUESTONLY; Though per my earlier comments, this likely needs to end up in reprogram_counter(). > + } else { > + kvm_pmu_request_counter_reprogram(pmc); > + } > } > return 0; > } > -- > 2.46.0.rc1.232.g9752f9e123-goog >