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Tue, 12 Nov 2024 09:04:19 +0000 Date: Tue, 12 Nov 2024 17:04:11 +0800 From: Chao Gao To: Sean Christopherson CC: Paolo Bonzini , , Subject: Re: [PATCH 5/5] KVM: nVMX: Honor event priority when emulating PI delivery during VM-Enter Message-ID: References: <20241101191447.1807602-1-seanjc@google.com> <20241101191447.1807602-6-seanjc@google.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20241101191447.1807602-6-seanjc@google.com> X-ClientProxiedBy: SI2PR04CA0011.apcprd04.prod.outlook.com (2603:1096:4:197::10) To CH3PR11MB8660.namprd11.prod.outlook.com (2603:10b6:610:1ce::13) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PR11MB8660:EE_|PH0PR11MB5110:EE_ X-MS-Office365-Filtering-Correlation-Id: 92e2af3d-b543-4178-661e-08dd02f8fe43 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014; 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To avoid a >pointless forced immediate exit, i.e. to not regress IRQ delivery latency >when a nested posted interrupt is pending at VM-Enter, block processing of >the notification IRQ if and only if KVM must block _all_ events. Unlike >injected events, KVM doesn't need to actually enter L2 before updating the >vIRR and vmcs02.GUEST_INTR_STATUS, as the resulting L2 IRQ will be blocked >by hardware itself, until VM-Enter to L2 completes. > >Note, very strictly speaking, moving the IRQ from L2's PIR to IRR before >entering L2 is still technically wrong. But, practically speaking, only a >userspace that is deliberately checking KVM_STATE_NESTED_RUN_PENDING >against PIR and IRR can even notice; L2 will see architecturally correct >behavior, as KVM ensure the VM-Enter is finished before doing anything >that would effectively preempt the PIR=>IRR movement. In my understanding, L1 can notice some priority issue in some cases. e.g., L1 enables NMI window VM-exit and enters L2 with a nested posted interrupt notification. Assuming L2 doesn't block NMIs, then NMI window VM-exit should happen immediately after nested VM-enter even before the nested posted interrupt processing. Another case is the nested VM-enter may inject some events (i.e., vmcs12->vm_entry_intr_info_field has a valid event). Event injection has higher priority over external interrupt VM-exit. The event injection may encounter EPT_VIOLATION which needs to be reflected to L1. In this case, L1 is supposed to observe the EPT VIOLATION before the nested posted interrupt processing.