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Peter Anvin" , Andy Lutomirski , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Paolo Bonzini , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, loongarch@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Kan Liang , Yongwei Ma , Mingwei Zhang , Xiong Zhang , Sandipan Das , Dapeng Mi Content-Type: text/plain; charset="us-ascii" On Fri, Aug 15, 2025, Peter Zijlstra wrote: > > diff --git a/kernel/events/core.c b/kernel/events/core.c > > index e1df3c3bfc0d..ad22b182762e 100644 > > --- a/kernel/events/core.c > > +++ b/kernel/events/core.c > > @@ -6408,6 +6408,8 @@ void perf_load_guest_context(unsigned long data) > > task_ctx_sched_out(cpuctx->task_ctx, NULL, EVENT_GUEST); > > } > > > > + arch_perf_load_guest_context(data); > > So I still don't understand why this ever needs to reach the generic > code. x86 pmu driver and x86 kvm can surely sort this out inside of x86, > no? It's definitely possible to handle this entirely within x86, I just don't love switching the LVTPC without the protection of perf_ctx_lock and perf_ctx_disable(). It's not a sticking point for me if you strongly prefer something like this: diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 0e5048ae86fa..86b81c217b97 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -1319,7 +1319,9 @@ void kvm_mediated_pmu_load(struct kvm_vcpu *vcpu) lockdep_assert_irqs_disabled(); - perf_load_guest_context(kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTPC)); + perf_load_guest_context(); + + perf_load_guest_lvtpc(kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTPC)); /* * Disable all counters before loading event selectors and PMCs so that @@ -1380,5 +1382,7 @@ void kvm_mediated_pmu_put(struct kvm_vcpu *vcpu) kvm_pmu_put_guest_pmcs(vcpu); + perf_put_guest_lvtpc(); + perf_put_guest_context(); }