From: Chao Gao <chao.gao@intel.com>
To: John Allen <john.allen@amd.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<x86@kernel.org>, <seanjc@google.com>, <pbonzini@redhat.com>,
<dave.hansen@intel.com>, <rick.p.edgecombe@intel.com>,
<mlevitsk@redhat.com>, <weijiang.yang@intel.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
<mingo@redhat.com>, <tglx@linutronix.de>,
<thomas.lendacky@amd.com>
Subject: Re: [PATCH v3 3/5] KVM: x86: SVM: Pass through shadow stack MSRs
Date: Mon, 25 Aug 2025 09:21:54 +0800 [thread overview]
Message-ID: <aKu6sp1ikRetv/Q1@intel.com> (raw)
In-Reply-To: <20250806204510.59083-4-john.allen@amd.com>
On Wed, Aug 06, 2025 at 08:45:08PM +0000, John Allen wrote:
>If kvm supports shadow stack, pass through shadow stack MSRs to improve
>guest performance.
The changelog is a bit sparse. Perhaps you could include something similar
to what I did in my v13 version:
Pass through shadow stack MSRs that are managed by XSAVE, as they cannot be
intercepted without also intercepting XSAVE. However, intercepting XSAVE would
likely cause unacceptable performance overhead.
MSR_IA32_INT_SSP_TAB is not managed by XSAVE, so it is intercepted.
>
>Signed-off-by: John Allen <john.allen@amd.com>
>---
> arch/x86/kvm/svm/svm.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
>diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
>index a027d3c37181..82cde3578c96 100644
>--- a/arch/x86/kvm/svm/svm.c
>+++ b/arch/x86/kvm/svm/svm.c
>@@ -838,6 +838,18 @@ static void svm_recalc_msr_intercepts(struct kvm_vcpu *vcpu)
> svm_set_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_ESP, MSR_TYPE_RW,
> guest_cpuid_is_intel_compatible(vcpu));
>
>+ if (kvm_cpu_cap_has(X86_FEATURE_SHSTK)) {
>+ bool shstk_enabled = guest_cpu_cap_has(vcpu, X86_FEATURE_SHSTK);
>+
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_U_CET, MSR_TYPE_RW, !shstk_enabled);
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_S_CET, MSR_TYPE_RW, !shstk_enabled);
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_PL0_SSP, MSR_TYPE_RW, !shstk_enabled);
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_PL1_SSP, MSR_TYPE_RW, !shstk_enabled);
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_PL2_SSP, MSR_TYPE_RW, !shstk_enabled);
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_PL3_SSP, MSR_TYPE_RW, !shstk_enabled);
>+ svm_set_intercept_for_msr(vcpu, MSR_IA32_INT_SSP_TAB, MSR_TYPE_RW, !shstk_enabled);
MSR_IA32_INT_SSP_TAB should be intercepted unless there is a justification for
pass-through. See Sean's comment below
https://lore.kernel.org/kvm/aKTGVvOb8PZ7mzVr@google.com/
With above nits fixed,
Reviewed-by: Chao Gao <chao.gao@intel.com>
>+ }
>+
> if (sev_es_guest(vcpu->kvm))
> sev_es_recalc_msr_intercepts(vcpu);
>
>--
>2.34.1
>
next prev parent reply other threads:[~2025-08-25 1:22 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 20:45 [PATCH v3 0/5] Enable Shadow Stack Virtualization for SVM John Allen
2025-08-06 20:45 ` [PATCH v3 1/5] KVM: x86: SVM: Emulate reads and writes to shadow stack MSRs John Allen
2025-08-25 1:27 ` Chao Gao
2025-08-06 20:45 ` [PATCH v3 2/5] KVM: x86: SVM: Update dump_vmcb with shadow stack save area additions John Allen
2025-08-22 20:57 ` Tom Lendacky
2025-08-06 20:45 ` [PATCH v3 3/5] KVM: x86: SVM: Pass through shadow stack MSRs John Allen
2025-08-25 1:21 ` Chao Gao [this message]
2025-08-06 20:45 ` [PATCH v3 4/5] KVM: SVM: Add MSR_IA32_XSS to the GHCB for hypervisor kernel John Allen
2025-08-25 1:46 ` Chao Gao
2025-08-06 20:45 ` [PATCH v3 5/5] KVM: SVM: Enable shadow stack virtualization for SVM John Allen
2025-08-25 1:33 ` Chao Gao
2025-09-03 21:01 ` John Allen
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