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AJvYcCU4l6i1nFkyPH3+TO0wwswtOQ5QRxEgvu3J7FAW/oZyGZ9FJqdGWsLzEmKaFXZRbVCcyp8=@vger.kernel.org X-Gm-Message-State: AOJu0YxnfcbY7hUmzzkv4pneaRdVQYT6NQSgLrMVO97/+YGxORwJOJ5b +6Z22eUzouUsWa/eNybcCnTI5Yal6ys3f/B1qXuzTpqU55OPaCDulpSe0R7n+haPsM7h0HaqY9S AZDazTA== X-Google-Smtp-Source: AGHT+IEt9OdbWxtc6AYige90fBSwtnNPY6nA9lHy3V8mdb8lVXQEswni2xr/2m7RjmFhT4E+7RMjQTSbWpw= X-Received: from pjbhl16.prod.google.com ([2002:a17:90b:1350:b0:32d:a0b1:2b03]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:3947:b0:243:c274:1a7f with SMTP id adf61e73a8af0-27aac993578mr5089210637.46.1758144326668; Wed, 17 Sep 2025 14:25:26 -0700 (PDT) Date: Wed, 17 Sep 2025 14:25:25 -0700 In-Reply-To: <65465d1e-a7bd-4eac-a0ba-8c6cce85e3ed@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250912232319.429659-1-seanjc@google.com> <20250912232319.429659-18-seanjc@google.com> <65465d1e-a7bd-4eac-a0ba-8c6cce85e3ed@intel.com> Message-ID: Subject: Re: [PATCH v15 17/41] KVM: VMX: Set host constant supervisor states to VMCS fields From: Sean Christopherson To: Xiaoyao Li Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Lendacky , Mathias Krause , John Allen , Rick Edgecombe , Chao Gao , Maxim Levitsky , Zhang Yi Z Content-Type: text/plain; charset="us-ascii" On Wed, Sep 17, 2025, Xiaoyao Li wrote: > On 9/13/2025 7:22 AM, Sean Christopherson wrote: > ... > > +static inline bool cpu_has_load_cet_ctrl(void) > > +{ > > + return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_CET_STATE); > > +} > > When looking at the patch 19, I realize that > > { VM_ENTRY_LOAD_CET_STATE, VM_EXIT_LOAD_CET_STATE } > > is added into vmcs_entry_exit_pairs[] there. > > So ... > > > static inline bool cpu_has_vmx_mpx(void) > > { > > return vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS; > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > > index adf5af30e537..e8155635cb42 100644 > > --- a/arch/x86/kvm/vmx/vmx.c > > +++ b/arch/x86/kvm/vmx/vmx.c > > @@ -4320,6 +4320,21 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx) > > if (cpu_has_load_ia32_efer()) > > vmcs_write64(HOST_IA32_EFER, kvm_host.efer); > > + > > + /* > > + * Supervisor shadow stack is not enabled on host side, i.e., > > + * host IA32_S_CET.SHSTK_EN bit is guaranteed to 0 now, per SDM > > + * description(RDSSP instruction), SSP is not readable in CPL0, > > + * so resetting the two registers to 0s at VM-Exit does no harm > > + * to kernel execution. When execution flow exits to userspace, > > + * SSP is reloaded from IA32_PL3_SSP. Check SDM Vol.2A/B Chapter > > + * 3 and 4 for details. > > + */ > > + if (cpu_has_load_cet_ctrl()) { > > ... cpu_has_load_cet_ctrl() cannot ensure the existence of host CET fields, > unless we change it to check vmcs_config.vmexit_ctrl or add CET entry_exit > pair into the vmcs_entry_exit_pairs[] in this patch. I *love* the attention to detail, but I think we're actually good, technically. cpu_has_load_cet_ctrl() will always return %false until patch 19, because VM_ENTRY_LOAD_CET_STATE isn't added to the set of OPTIONAL controls until then, i.e. VM_ENTRY_LOAD_CET_STATE won't be set in vmcs_config.vmentry_ctrl until the exit control is as well (and the sanity check is in place). > > + vmcs_writel(HOST_S_CET, kvm_host.s_cet); > > + vmcs_writel(HOST_SSP, 0); > > + vmcs_writel(HOST_INTR_SSP_TABLE, 0); > > + } > > }