Re: [PATCH 01/13] KVM: arm64: selftests: Provide kvm_arch_vm_post_create() in library code

[Itaru Kitayama <itaru.kitayama@linux.dev>]

On Wed, Sep 17, 2025 at 02:20:31PM -0700, Oliver Upton wrote:
> In order to compel the default usage of EL2 in selftests, move
> kvm_arch_vm_post_create() to library code and expose an opt-in for using
> MTE by default.
> 
> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
> ---
>  .../testing/selftests/kvm/arm64/set_id_regs.c | 19 +++++--------------
>  .../selftests/kvm/include/arm64/processor.h   |  2 ++
>  .../selftests/kvm/lib/arm64/processor.c       | 13 +++++++++++++
>  3 files changed, 20 insertions(+), 14 deletions(-)
> 
> diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testing/selftests/kvm/arm64/set_id_regs.c
> index 189321e96925..a2d367a2c93c 100644
> --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c
> +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c
> @@ -15,8 +15,6 @@
>  #include "test_util.h"
>  #include <linux/bitfield.h>
>  
> -bool have_cap_arm_mte;
> -
>  enum ftr_type {
>  	FTR_EXACT,			/* Use a predefined safe value */
>  	FTR_LOWER_SAFE,			/* Smaller value is safe */
> @@ -568,7 +566,9 @@ static void test_user_set_mte_reg(struct kvm_vcpu *vcpu)
>  	uint64_t mte_frac;
>  	int idx, err;
>  
> -	if (!have_cap_arm_mte) {
> +	val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR1_EL1));
> +	mte = FIELD_GET(ID_AA64PFR1_EL1_MTE, val);
> +	if (!mte) {
>  		ksft_test_result_skip("MTE capability not supported, nothing to test\n");
>  		return;
>  	}
> @@ -593,9 +593,6 @@ static void test_user_set_mte_reg(struct kvm_vcpu *vcpu)
>  	 * from unsupported (0xF) to supported (0).
>  	 *
>  	 */
> -	val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR1_EL1));
> -
> -	mte = FIELD_GET(ID_AA64PFR1_EL1_MTE, val);
>  	mte_frac = FIELD_GET(ID_AA64PFR1_EL1_MTE_frac, val);
>  	if (mte != ID_AA64PFR1_EL1_MTE_MTE2 ||
>  	    mte_frac != ID_AA64PFR1_EL1_MTE_frac_NI) {
> @@ -750,14 +747,6 @@ static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu)
>  	ksft_test_result_pass("%s\n", __func__);
>  }
>  
> -void kvm_arch_vm_post_create(struct kvm_vm *vm)
> -{
> -	if (vm_check_cap(vm, KVM_CAP_ARM_MTE)) {
> -		vm_enable_cap(vm, KVM_CAP_ARM_MTE, 0);
> -		have_cap_arm_mte = true;
> -	}
> -}
> -
>  int main(void)
>  {
>  	struct kvm_vcpu *vcpu;
> @@ -769,6 +758,8 @@ int main(void)
>  	TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES));
>  	TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_WRITABLE_IMP_ID_REGS));
>  
> +	test_wants_mte();
> +
>  	vm = vm_create(1);
>  	vm_enable_cap(vm, KVM_CAP_ARM_WRITABLE_IMP_ID_REGS, 0);
>  	vcpu = vm_vcpu_add(vm, 0, guest_code);
> diff --git a/tools/testing/selftests/kvm/include/arm64/processor.h b/tools/testing/selftests/kvm/include/arm64/processor.h
> index 255fed769a8a..8370fc94041d 100644
> --- a/tools/testing/selftests/kvm/include/arm64/processor.h
> +++ b/tools/testing/selftests/kvm/include/arm64/processor.h
> @@ -300,4 +300,6 @@ void smccc_smc(uint32_t function_id, uint64_t arg0, uint64_t arg1,
>  /* Execute a Wait For Interrupt instruction. */
>  void wfi(void);
>  
> +void test_wants_mte(void);
> +
>  #endif /* SELFTEST_KVM_PROCESSOR_H */
> diff --git a/tools/testing/selftests/kvm/lib/arm64/processor.c b/tools/testing/selftests/kvm/lib/arm64/processor.c
> index eb115123d741..caed1998c7b3 100644
> --- a/tools/testing/selftests/kvm/lib/arm64/processor.c
> +++ b/tools/testing/selftests/kvm/lib/arm64/processor.c
> @@ -653,3 +653,16 @@ void wfi(void)
>  {
>  	asm volatile("wfi");
>  }
> +
> +static bool request_mte;
> +
> +void test_wants_mte(void)
> +{
> +	request_mte = true;
> +}
> +
> +void kvm_arch_vm_post_create(struct kvm_vm *vm)
> +{
> +	if (request_mte && vm_check_cap(vm, KVM_CAP_ARM_MTE))
> +		vm_enable_cap(vm, KVM_CAP_ARM_MTE, 0);
> +}
> -- 
> 2.47.3
>

Hi,
On FVP RevC with the kernel your series applied, I see set_id_regs fails
to execute.

# ./arm64/set_id_regs
Random seed: 0x6b8b4567
TAP version 13
1..102
ok 1 ID_AA64DFR0_EL1_DoubleLock
ok 2 ID_AA64DFR0_EL1_WRPs
ok 3 ID_AA64DFR0_EL1_PMUVer
ok 4 ID_AA64DFR0_EL1_DebugVer
ok 5 # SKIP ID_DFR0_EL1_PerfMon on AARCH64 only system
ok 6 # SKIP ID_DFR0_EL1_CopDbg on AARCH64 only system
ok 7 ID_AA64ISAR0_EL1_RNDR
ok 8 ID_AA64ISAR0_EL1_TLB
ok 9 ID_AA64ISAR0_EL1_TS
ok 10 ID_AA64ISAR0_EL1_FHM
ok 11 ID_AA64ISAR0_EL1_DP
ok 12 ID_AA64ISAR0_EL1_SM4
ok 13 ID_AA64ISAR0_EL1_SM3
ok 14 ID_AA64ISAR0_EL1_SHA3
ok 15 ID_AA64ISAR0_EL1_RDM
ok 16 ID_AA64ISAR0_EL1_TME
ok 17 ID_AA64ISAR0_EL1_ATOMIC
ok 18 ID_AA64ISAR0_EL1_CRC32
ok 19 ID_AA64ISAR0_EL1_SHA2
ok 20 ID_AA64ISAR0_EL1_SHA1
ok 21 ID_AA64ISAR0_EL1_AES
ok 22 ID_AA64ISAR1_EL1_LS64
ok 23 ID_AA64ISAR1_EL1_XS
ok 24 ID_AA64ISAR1_EL1_I8MM
ok 25 ID_AA64ISAR1_EL1_DGH
ok 26 ID_AA64ISAR1_EL1_BF16
ok 27 ID_AA64ISAR1_EL1_SPECRES
ok 28 ID_AA64ISAR1_EL1_SB
ok 29 ID_AA64ISAR1_EL1_FRINTTS
ok 30 ID_AA64ISAR1_EL1_LRCPC
ok 31 ID_AA64ISAR1_EL1_FCMA
ok 32 ID_AA64ISAR1_EL1_JSCVT
ok 33 ID_AA64ISAR1_EL1_DPB
ok 34 ID_AA64ISAR2_EL1_BC
ok 35 ID_AA64ISAR2_EL1_RPRES
ok 36 ID_AA64ISAR2_EL1_WFxT
ok 37 ID_AA64PFR0_EL1_CSV3
ok 38 ID_AA64PFR0_EL1_CSV2
ok 39 ID_AA64PFR0_EL1_DIT
ok 40 ID_AA64PFR0_EL1_SEL2
ok 41 ID_AA64PFR0_EL1_GIC
ok 42 ID_AA64PFR0_EL1_EL3
ok 43 ID_AA64PFR0_EL1_EL2
ok 44 ID_AA64PFR0_EL1_EL1
ok 45 ID_AA64PFR0_EL1_EL0
ok 46 ID_AA64PFR1_EL1_DF2
ok 47 ID_AA64PFR1_EL1_CSV2_frac
ok 48 ID_AA64PFR1_EL1_SSBS
ok 49 ID_AA64PFR1_EL1_BT
ok 50 ID_AA64MMFR0_EL1_ECV
ok 51 ID_AA64MMFR0_EL1_EXS
==== Test Assertion Failure ====
  include/kvm_util.h:815: !ret
    pid=897 tid=897 errno=22 - Invalid argument
    sh: line 1: addr2line: command not found
      KVM_SET_ONE_REG failed, rc: -1 errno: 22 (Invalid argument)