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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?eW6m4QyaBKpKJMPG7d8Sw0bOW/8fICD7AGhhRSnPHroKVvaqBjVBSterSi3e?= =?us-ascii?Q?Mc/vrQXRHJqCPJB+OJ/p6hhX9LDUyXtzQZ896+RXc5fJCxJsIv4R4NAEO0P6?= =?us-ascii?Q?jgC0rjr2F73B5O2SOrCarmteiWJKUzKXgUEpuH6FspKLloGw5iwHpxiV0mf/?= =?us-ascii?Q?umF3wh2JPZKYyAdV4m27baLQu+H+x7mlvQ+tC+ddbytnrO2fql9wGQP3Vpjy?= =?us-ascii?Q?CdTu7iPUmHesZelpCud890sLfDyPrR1ch5yhs3qqZaRNNCl/mJs01S4CkBDH?= =?us-ascii?Q?GsteoIrrsLQ036RrgqZM8UZwEmcshEEYxOCHAMm9zaAJIs6g4FkBh10/870k?= =?us-ascii?Q?2VYjkhGeucovZcYgJdfTEcEcSYGjpcaQhk2cr96JpBTZnNoyknXdlN0DsynG?= =?us-ascii?Q?2jPxwRdVJwwJX/sllqLb+BKFGS/f202ntLSC00FKwNFcgUa+exNxDM3/WULX?= =?us-ascii?Q?a8jSzaVuK+v0PfGleSmUnbFq7CE1JFP2OE8xFXbz8lsywDxW9C2RB+bHLUwV?= =?us-ascii?Q?aUIklIjP/7pctd5vuyWPlTYG80BT1w7S3+fr5MUXnWypyvmB/fI+brntaGYI?= =?us-ascii?Q?IaSGCBaPnJ9szDKX8al/CiDf6X33XlFImn3D6IX1cr/0rty3g1oayQoO+dsk?= =?us-ascii?Q?aKnkCkCqwgVnXkRWVejL6/73hVJnSSRXtGmWJ/oAhfg0LEOKo3XZ2Mw/IgkL?= =?us-ascii?Q?PQwNX/25UohecXeTn1MKrpsxzMSISt6JuvbXf/3b6GCB3HSza9ARcTMGxoDl?= =?us-ascii?Q?a1fSvsiF7Cm/CRGOIVM4cyjP0F9zm9QvK7v45HYy0X8n2xSnfLQDbK8cJSTz?= =?us-ascii?Q?CRmTTymcK6VcGA969OYJzy0ACNp38LX1F0qQLMkGuA4ZvZ2EJCc58XYuRhLe?= =?us-ascii?Q?MgEISZFU1n3s/26q2SXJXt/3/R8AP2LCJ4MJ7I90cpeQjancbngXhqpaRqPx?= =?us-ascii?Q?yQzxlfCXBqZ4Z6yN9b9mW4isobhAUMMOmA8uimya8inPuWcz3XzSD0Xi7JY2?= =?us-ascii?Q?wN+NKSvT1JRfbyOACUQ5eBTYHOPb/BdYOrAtObEXZuIb9AsRuhfKAvjgipc4?= =?us-ascii?Q?tiv5xWri66dtzlToKMsA2NFRL4GJO2U5kMU3Z0fFFoJgKM8/J9AlCPpeKMnw?= =?us-ascii?Q?sV3lvBQU3o4BHr/xXFPI9ipTtZPteiV44WXFphAyfDeNvGLmHxTBIaOFa1AH?= =?us-ascii?Q?U5bV7LGgK+wIofIq05jnQ/42qOCT5nuzCbL9YiBf4YpwaaMoqxErHevBG45N?= =?us-ascii?Q?ezS54ZM7Y/4BNK7pekSWBhl/QXPrBxzcNJVR5L2rDvEEvNL+jAKqv2ueTAhZ?= =?us-ascii?Q?FfPCZaZPKr8eVJqWxI9l6E/E6FMJQ1TSoABPjLUHEtaSguq4zciRHkl16USn?= =?us-ascii?Q?3mEFxg6DUQIID0BmuxBCgUX5tOgJSpOZqiqfV4LWcO4YK5WdIaDJaqac2Blu?= =?us-ascii?Q?yqDBpRO0yTIeO7DvqphOGYU9edhWHs9CbeRHIH0IK+UbvGgb4ParBEz2uU7x?= =?us-ascii?Q?IzKY/nMlcAViotcSu/CLzxLFdpmxVEPQmYEj5pNmrf3RtsPBMybKTbUivat1?= =?us-ascii?Q?izZDGidksUb6pwE8oUhxgFeulYq87gnTmo8aw2Qg?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 28529ffa-f679-4561-81c4-08ddf6f9a12d X-MS-Exchange-CrossTenant-AuthSource: BL1PR12MB5995.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2025 21:23:37.0582 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Q1VvN2/H18FZZS8fQWfUXsWy+eN1WZyHnVhFDtK0vHm+ytWC/6/haH7wKOkM4HnkPoYf5joFfBOdEW4u9th5fA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8367 On Thu, Sep 18, 2025 at 01:44:13PM -0700, Sean Christopherson wrote: > On Thu, Sep 18, 2025, Sean Christopherson wrote: > > On Thu, Sep 18, 2025, John Allen wrote: > > > On Tue, Sep 16, 2025 at 05:55:33PM -0500, John Allen wrote: > > > > Interesting, I see "Guest CPUID doesn't have XSAVES" times the number of > > > > cpus followed by "XSS already set to val = 0, eliding updates" times the > > > > number of cpus. This is with host tracing only. I can try with guest > > > > tracing too in the morning. > > > > > > Ok, I think I see the problem. The cases above where we were seeing the > > > added print statements from kvm_set_msr_common were not situations where > > > we were going through the __kvm_emulate_msr_write via > > > sev_es_sync_from_ghcb. When we call __kvm_emulate_msr_write from this > > > context, we never end up getting to kvm_set_msr_common because we hit > > > the following statement at the top of svm_set_msr: > > > > > > if (sev_es_prevent_msr_access(vcpu, msr)) > > > return vcpu->kvm->arch.has_protected_state ? -EINVAL : 0; > > > > Gah, I was looking for something like that but couldn't find it, obviously. > > > > > So I'm not sure if this would force using the original method of > > > directly setting arch.ia32_xss or if there's some additional handling > > > here that we need in this scenario to allow the msr access. > > > > Does this fix things? If so, I'll slot in a patch to extract setting XSS to > > the helper, and then this patch can use that API. I like the symmetry between > > __kvm_set_xcr() and __kvm_set_xss(), and I especially like not doing a generic > > end-around on svm_set_msr() by calling kvm_set_msr_common() directly. > > Scratch that, KVM supports intra-host (and inter-host?) migration of SEV-ES > guests and so needs to allow the host to save/restore XSS, otherwise a guest > that *knows* its XSS hasn't change could get stale/bad CPUID emulation if the > guest doesn't provide XSS in the GHCB on every exit. > > So while seemingly hacky, I'm pretty sure the right solution is actually: > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index cabe1950b160..d48bf20c865b 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -2721,8 +2721,8 @@ static int svm_get_feature_msr(u32 msr, u64 *data) > static bool sev_es_prevent_msr_access(struct kvm_vcpu *vcpu, > struct msr_data *msr_info) > { > - return sev_es_guest(vcpu->kvm) && > - vcpu->arch.guest_state_protected && > + return sev_es_guest(vcpu->kvm) && vcpu->arch.guest_state_protected && > + msr_info->index != MSR_IA32_XSS && > !msr_write_intercepted(vcpu, msr_info->index); > } Yes, it looks like this fixes the regression. Thanks! The 32bit selftest still doesn't work properly with sev-es, but that was a problem with the previous version too. I suspect there's some incompatibility between sev-es and the test, but I haven't been able to get a good answer on why that might be. Thanks, John > > Side topic, checking msr_write_intercepted() is likely wrong. It's a bad > heuristic for "managed in the VMSA". MSRs that _KVM_ loads into hardware and > context switches should still be accessible. I haven't looked to see if this is > a problem in practice. > > > > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > > index 945f7da60107..ace9f321d2c9 100644 > > --- a/arch/x86/include/asm/kvm_host.h > > +++ b/arch/x86/include/asm/kvm_host.h > > @@ -2213,6 +2213,7 @@ unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); > > void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); > > int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); > > int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); > > +int __kvm_set_xss(struct kvm_vcpu *vcpu, u64 xss); > > > > int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); > > int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); > > diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c > > index 94d9acc94c9a..462aebc54135 100644 > > --- a/arch/x86/kvm/svm/sev.c > > +++ b/arch/x86/kvm/svm/sev.c > > @@ -3355,7 +3355,7 @@ static void sev_es_sync_from_ghcb(struct vcpu_svm *svm) > > __kvm_set_xcr(vcpu, 0, kvm_ghcb_get_xcr0(svm)); > > > > if (kvm_ghcb_xss_is_valid(svm)) > > - __kvm_emulate_msr_write(vcpu, MSR_IA32_XSS, kvm_ghcb_get_xss(svm)); > > + __kvm_set_xss(vcpu, kvm_ghcb_get_xss(svm)); > > > > /* Copy the GHCB exit information into the VMCB fields */ > > exit_code = kvm_ghcb_get_sw_exit_code(svm); > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > > index 5bbc187ab428..9b81e92a8de5 100644 > > --- a/arch/x86/kvm/x86.c > > +++ b/arch/x86/kvm/x86.c > > @@ -1313,6 +1313,22 @@ int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu) > > } > > EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_emulate_xsetbv); > > > > +int __kvm_set_xss(struct kvm_vcpu *vcpu, u64 xss) > > +{ > > + if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)) > > + return KVM_MSR_RET_UNSUPPORTED; > > + > > + if (xss & ~vcpu->arch.guest_supported_xss) > > + return 1; > > + if (vcpu->arch.ia32_xss == xss) > > + return 0; > > + > > + vcpu->arch.ia32_xss = xss; > > + vcpu->arch.cpuid_dynamic_bits_dirty = true; > > + return 0; > > +} > > +EXPORT_SYMBOL_GPL(__kvm_set_xss); > > + > > static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) > > { > > return __kvm_is_valid_cr4(vcpu, cr4) && > > @@ -4119,16 +4135,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > > } > > break; > > case MSR_IA32_XSS: > > - if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVES)) > > - return KVM_MSR_RET_UNSUPPORTED; > > - > > - if (data & ~vcpu->arch.guest_supported_xss) > > - return 1; > > - if (vcpu->arch.ia32_xss == data) > > - break; > > - vcpu->arch.ia32_xss = data; > > - vcpu->arch.cpuid_dynamic_bits_dirty = true; > > - break; > > + return __kvm_set_xss(vcpu, data); > > case MSR_SMI_COUNT: > > if (!msr_info->host_initiated) > > return 1;